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authorDario Nieuwenhuis <[email protected]>2024-04-13 02:13:41 +0200
committerDario Nieuwenhuis <[email protected]>2024-04-14 22:29:07 +0200
commit65c085ce910f50903bc5c41ca82eda989810f855 (patch)
tree2dde97f356234411a1c5d780eba9e55a7f90f8ff /embassy-stm32/src/exti.rs
parent87b79d449916b26d0d29b6247ae366a80c02cfa5 (diff)
Add stm32u0 support.
Diffstat (limited to 'embassy-stm32/src/exti.rs')
-rw-r--r--embassy-stm32/src/exti.rs16
1 files changed, 8 insertions, 8 deletions
diff --git a/embassy-stm32/src/exti.rs b/embassy-stm32/src/exti.rs
index 8d5dae436..224d51b84 100644
--- a/embassy-stm32/src/exti.rs
+++ b/embassy-stm32/src/exti.rs
@@ -27,11 +27,11 @@ fn cpu_regs() -> pac::exti::Exti {
27 EXTI 27 EXTI
28} 28}
29 29
30#[cfg(not(any(exti_c0, exti_g0, exti_l5, gpio_v1, exti_u5, exti_h5, exti_h50)))] 30#[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, gpio_v1, exti_u5, exti_h5, exti_h50)))]
31fn exticr_regs() -> pac::syscfg::Syscfg { 31fn exticr_regs() -> pac::syscfg::Syscfg {
32 pac::SYSCFG 32 pac::SYSCFG
33} 33}
34#[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] 34#[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))]
35fn exticr_regs() -> pac::exti::Exti { 35fn exticr_regs() -> pac::exti::Exti {
36 EXTI 36 EXTI
37} 37}
@@ -44,9 +44,9 @@ unsafe fn on_irq() {
44 #[cfg(feature = "low-power")] 44 #[cfg(feature = "low-power")]
45 crate::low_power::on_wakeup_irq(); 45 crate::low_power::on_wakeup_irq();
46 46
47 #[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))] 47 #[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50)))]
48 let bits = EXTI.pr(0).read().0; 48 let bits = EXTI.pr(0).read().0;
49 #[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] 49 #[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))]
50 let bits = EXTI.rpr(0).read().0 | EXTI.fpr(0).read().0; 50 let bits = EXTI.rpr(0).read().0 | EXTI.fpr(0).read().0;
51 51
52 // We don't handle or change any EXTI lines above 16. 52 // We don't handle or change any EXTI lines above 16.
@@ -61,9 +61,9 @@ unsafe fn on_irq() {
61 } 61 }
62 62
63 // Clear pending 63 // Clear pending
64 #[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))] 64 #[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50)))]
65 EXTI.pr(0).write_value(Lines(bits)); 65 EXTI.pr(0).write_value(Lines(bits));
66 #[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] 66 #[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))]
67 { 67 {
68 EXTI.rpr(0).write_value(Lines(bits)); 68 EXTI.rpr(0).write_value(Lines(bits));
69 EXTI.fpr(0).write_value(Lines(bits)); 69 EXTI.fpr(0).write_value(Lines(bits));
@@ -241,9 +241,9 @@ impl<'a> ExtiInputFuture<'a> {
241 EXTI.ftsr(0).modify(|w| w.set_line(pin, falling)); 241 EXTI.ftsr(0).modify(|w| w.set_line(pin, falling));
242 242
243 // clear pending bit 243 // clear pending bit
244 #[cfg(not(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50)))] 244 #[cfg(not(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50)))]
245 EXTI.pr(0).write(|w| w.set_line(pin, true)); 245 EXTI.pr(0).write(|w| w.set_line(pin, true));
246 #[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))] 246 #[cfg(any(exti_c0, exti_g0, exti_u0, exti_l5, exti_u5, exti_h5, exti_h50))]
247 { 247 {
248 EXTI.rpr(0).write(|w| w.set_line(pin, true)); 248 EXTI.rpr(0).write(|w| w.set_line(pin, true));
249 EXTI.fpr(0).write(|w| w.set_line(pin, true)); 249 EXTI.fpr(0).write(|w| w.set_line(pin, true));