configure flash latency after axi clock and handle different flash in STM32H7A/B devices

2 files changed, 13 insertions, 3 deletions

diff --git a/embassy-stm32/src/flash/h7.rs b/embassy-stm32/src/flash/h7.rs
index bb429d773..625bf13fc 100644
--- a/embassy-stm32/src/flash/h7.rs
+++ b/embassy-stm32/src/flash/h7.rs
@@ -11,7 +11,7 @@ pub const fn is_default_layout() -> bool {
 }
 
 const fn is_dual_bank() -> bool {
-    FLASH_REGIONS.len() == 2
+    FLASH_REGIONS.len() >= 2
 }
 
 pub fn get_flash_regions() -> &'static [&'static FlashRegion] {
@@ -49,6 +49,7 @@ pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE])
     };
     bank.cr().write(|w| {
         w.set_pg(true);
+        #[cfg(flash_h7)]
         w.set_psize(2); // 32 bits at once
     });
     cortex_m::asm::isb();
@@ -85,7 +86,10 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E
     let bank = pac::FLASH.bank(sector.bank as usize);
     bank.cr().modify(|w| {
         w.set_ser(true);
-        w.set_snb(sector.index_in_bank)
+        #[cfg(flash_h7)]
+        w.set_snb(sector.index_in_bank);
+        #[cfg(flash_h7ab)]
+        w.set_ssn(sector.index_in_bank);
     });
 
     bank.cr().modify(|w| {
@@ -126,6 +130,10 @@ unsafe fn blocking_wait_ready(bank: pac::flash::Bank) -> Result<(), Error> {
                 error!("incerr");
                 return Err(Error::Seq);
             }
+            if sr.crcrderr() {
+                error!("crcrderr");
+                return Err(Error::Seq);
+            }
             if sr.operr() {
                 return Err(Error::Prog);
             }
diff --git a/embassy-stm32/src/flash/mod.rs b/embassy-stm32/src/flash/mod.rs
index 4308037f2..fb20dcd38 100644
--- a/embassy-stm32/src/flash/mod.rs
+++ b/embassy-stm32/src/flash/mod.rs
@@ -65,9 +65,11 @@ impl FlashRegion {
 #[cfg_attr(flash_f7, path = "f7.rs")]
 #[cfg_attr(flash_g0, path = "g0.rs")]
 #[cfg_attr(flash_h7, path = "h7.rs")]
+#[cfg_attr(flash_h7ab, path = "h7.rs")]
 #[cfg_attr(
     not(any(
-        flash_l0, flash_l1, flash_l4, flash_wl, flash_wb, flash_f0, flash_f3, flash_f4, flash_f7, flash_g0, flash_h7
+        flash_l0, flash_l1, flash_l4, flash_wl, flash_wb, flash_f0, flash_f3, flash_f4, flash_f7, flash_g0, flash_h7,
+        flash_h7ab
     )),
     path = "other.rs"
 )]