diff options
| author | chanterheld <[email protected]> | 2025-01-02 20:05:01 +0100 |
|---|---|---|
| committer | chanterheld <[email protected]> | 2025-01-02 20:05:01 +0100 |
| commit | f1ffbf2f7edc2afbf83ce75c7a3e0f59da09de00 (patch) | |
| tree | 66859c4d44f9ae98318e030469a984268365935f /embassy-stm32/src/flash | |
| parent | eaa44c3d3ff71fe3f6c3c343843272bea8b08cf3 (diff) | |
embassy-stm32. support g0 second flash bank
Diffstat (limited to 'embassy-stm32/src/flash')
| -rw-r--r-- | embassy-stm32/src/flash/g.rs | 18 | ||||
| -rw-r--r-- | embassy-stm32/src/flash/mod.rs | 4 |
2 files changed, 18 insertions, 4 deletions
diff --git a/embassy-stm32/src/flash/g.rs b/embassy-stm32/src/flash/g.rs index 01a0c603f..d02e1435d 100644 --- a/embassy-stm32/src/flash/g.rs +++ b/embassy-stm32/src/flash/g.rs | |||
| @@ -20,7 +20,7 @@ pub(crate) unsafe fn lock() { | |||
| 20 | } | 20 | } |
| 21 | pub(crate) unsafe fn unlock() { | 21 | pub(crate) unsafe fn unlock() { |
| 22 | // Wait, while the memory interface is busy. | 22 | // Wait, while the memory interface is busy. |
| 23 | while pac::FLASH.sr().read().bsy() {} | 23 | wait_busy(); |
| 24 | 24 | ||
| 25 | // Unlock flash | 25 | // Unlock flash |
| 26 | if pac::FLASH.cr().read().lock() { | 26 | if pac::FLASH.cr().read().lock() { |
| @@ -53,12 +53,16 @@ pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) | |||
| 53 | 53 | ||
| 54 | pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), Error> { | 54 | pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), Error> { |
| 55 | let idx = (sector.start - super::FLASH_BASE as u32) / super::BANK1_REGION.erase_size as u32; | 55 | let idx = (sector.start - super::FLASH_BASE as u32) / super::BANK1_REGION.erase_size as u32; |
| 56 | while pac::FLASH.sr().read().bsy() {} | 56 | wait_busy(); |
| 57 | clear_all_err(); | 57 | clear_all_err(); |
| 58 | 58 | ||
| 59 | interrupt::free(|_| { | 59 | interrupt::free(|_| { |
| 60 | pac::FLASH.cr().modify(|w| { | 60 | pac::FLASH.cr().modify(|w| { |
| 61 | w.set_per(true); | 61 | w.set_per(true); |
| 62 | w.set_bker(sector.bank == crate::flash::FlashBank::Bank2); | ||
| 63 | #[cfg(flash_g0x0)] | ||
| 64 | w.set_pnb(idx as u16); | ||
| 65 | #[cfg(not(flash_g0x0))] | ||
| 62 | w.set_pnb(idx as u8); | 66 | w.set_pnb(idx as u8); |
| 63 | w.set_strt(true); | 67 | w.set_strt(true); |
| 64 | }); | 68 | }); |
| @@ -94,3 +98,13 @@ pub(crate) unsafe fn clear_all_err() { | |||
| 94 | // This clears all "write 1 to clear" bits. | 98 | // This clears all "write 1 to clear" bits. |
| 95 | pac::FLASH.sr().modify(|_| {}); | 99 | pac::FLASH.sr().modify(|_| {}); |
| 96 | } | 100 | } |
| 101 | |||
| 102 | #[cfg(any(flash_g0x0, flash_g0x1))] | ||
| 103 | fn wait_busy(){ | ||
| 104 | while pac::FLASH.sr().read().bsy() & pac::FLASH.sr().read().bsy2() {} | ||
| 105 | } | ||
| 106 | |||
| 107 | #[cfg(not(any(flash_g0x0, flash_g0x1)))] | ||
| 108 | fn wait_busy(){ | ||
| 109 | while pac::FLASH.sr().read().bsy() {} | ||
| 110 | } \ No newline at end of file | ||
diff --git a/embassy-stm32/src/flash/mod.rs b/embassy-stm32/src/flash/mod.rs index 88fe6a291..a7eb3fbcc 100644 --- a/embassy-stm32/src/flash/mod.rs +++ b/embassy-stm32/src/flash/mod.rs | |||
| @@ -97,7 +97,7 @@ pub enum FlashBank { | |||
| 97 | #[cfg_attr(flash_f2, path = "f2.rs")] | 97 | #[cfg_attr(flash_f2, path = "f2.rs")] |
| 98 | #[cfg_attr(flash_f4, path = "f4.rs")] | 98 | #[cfg_attr(flash_f4, path = "f4.rs")] |
| 99 | #[cfg_attr(flash_f7, path = "f7.rs")] | 99 | #[cfg_attr(flash_f7, path = "f7.rs")] |
| 100 | #[cfg_attr(any(flash_g0, flash_g4c2, flash_g4c3, flash_g4c4), path = "g.rs")] | 100 | #[cfg_attr(any(flash_g0x0, flash_g0x1, flash_g4c2, flash_g4c3, flash_g4c4), path = "g.rs")] |
| 101 | #[cfg_attr(flash_h7, path = "h7.rs")] | 101 | #[cfg_attr(flash_h7, path = "h7.rs")] |
| 102 | #[cfg_attr(flash_h7ab, path = "h7.rs")] | 102 | #[cfg_attr(flash_h7ab, path = "h7.rs")] |
| 103 | #[cfg_attr(flash_u5, path = "u5.rs")] | 103 | #[cfg_attr(flash_u5, path = "u5.rs")] |
| @@ -107,7 +107,7 @@ pub enum FlashBank { | |||
| 107 | #[cfg_attr( | 107 | #[cfg_attr( |
| 108 | not(any( | 108 | not(any( |
| 109 | flash_l0, flash_l1, flash_l4, flash_l5, flash_wl, flash_wb, flash_f0, flash_f1, flash_f2, flash_f3, flash_f4, | 109 | flash_l0, flash_l1, flash_l4, flash_l5, flash_wl, flash_wb, flash_f0, flash_f1, flash_f2, flash_f3, flash_f4, |
| 110 | flash_f7, flash_g0, flash_g4c2, flash_g4c3, flash_g4c4, flash_h7, flash_h7ab, flash_u5, flash_h50, flash_u0, | 110 | flash_f7, flash_g0x0, flash_g0x1, flash_g4c2, flash_g4c3, flash_g4c4, flash_h7, flash_h7ab, flash_u5, flash_h50, flash_u0, |
| 111 | flash_h5, | 111 | flash_h5, |
| 112 | )), | 112 | )), |
| 113 | path = "other.rs" | 113 | path = "other.rs" |
