Merge branch 'main' into main

1 files changed, 47 insertions, 26 deletions

diff --git a/embassy-stm32/src/gpio.rs b/embassy-stm32/src/gpio.rs
index 5a8d23183..5de8bad2c 100644
--- a/embassy-stm32/src/gpio.rs
+++ b/embassy-stm32/src/gpio.rs
@@ -4,7 +4,7 @@
 use core::convert::Infallible;
 
 use critical_section::CriticalSection;
-use embassy_hal_internal::{impl_peripheral, Peri, PeripheralType};
+use embassy_hal_internal::{Peri, PeripheralType, impl_peripheral};
 
 use crate::pac::gpio::{self, vals};
 use crate::peripherals;
@@ -592,7 +592,7 @@ impl AfType {
 
 #[inline(never)]
 #[cfg(gpio_v1)]
-fn set_as_af(pin_port: u8, af_type: AfType) {
+fn set_as_af(pin_port: PinNumber, af_type: AfType) {
     let pin = unsafe { AnyPin::steal(pin_port) };
     let r = pin.block();
     let n = pin._pin() as usize;
@@ -649,7 +649,7 @@ impl AfType {
 
 #[inline(never)]
 #[cfg(gpio_v2)]
-fn set_as_af(pin_port: u8, af_num: u8, af_type: AfType) {
+fn set_as_af(pin_port: PinNumber, af_num: u8, af_type: AfType) {
     let pin = unsafe { AnyPin::steal(pin_port) };
     let r = pin.block();
     let n = pin._pin() as usize;
@@ -663,7 +663,7 @@ fn set_as_af(pin_port: u8, af_num: u8, af_type: AfType) {
 
 #[inline(never)]
 #[cfg(gpio_v2)]
-fn set_speed(pin_port: u8, speed: Speed) {
+fn set_speed(pin_port: PinNumber, speed: Speed) {
     let pin = unsafe { AnyPin::steal(pin_port) };
     let r = pin.block();
     let n = pin._pin() as usize;
@@ -672,7 +672,7 @@ fn set_speed(pin_port: u8, speed: Speed) {
 }
 
 #[inline(never)]
-fn set_as_analog(pin_port: u8) {
+fn set_as_analog(pin_port: PinNumber) {
     let pin = unsafe { AnyPin::steal(pin_port) };
     let r = pin.block();
     let n = pin._pin() as usize;
@@ -684,11 +684,15 @@ fn set_as_analog(pin_port: u8) {
     });
 
     #[cfg(gpio_v2)]
-    r.moder().modify(|w| w.set_moder(n, vals::Moder::ANALOG));
+    {
+        #[cfg(any(stm32l47x, stm32l48x))]
+        r.ascr().modify(|w| w.set_asc(n, true));
+        r.moder().modify(|w| w.set_moder(n, vals::Moder::ANALOG));
+    }
 }
 
 #[inline(never)]
-fn get_pull(pin_port: u8) -> Pull {
+fn get_pull(pin_port: PinNumber) -> Pull {
     let pin = unsafe { AnyPin::steal(pin_port) };
     let r = pin.block();
     let n = pin._pin() as usize;
@@ -727,15 +731,15 @@ pub struct AfioRemapBool<const V: bool>;
 pub struct AfioRemapNotApplicable;
 
 pub(crate) trait SealedPin {
-    fn pin_port(&self) -> u8;
+    fn pin_port(&self) -> PinNumber;
 
     #[inline]
-    fn _pin(&self) -> u8 {
+    fn _pin(&self) -> PinNumber {
         self.pin_port() % 16
     }
 
     #[inline]
-    fn _port(&self) -> u8 {
+    fn _port(&self) -> PinNumber {
         self.pin_port() / 16
     }
 
@@ -798,31 +802,49 @@ pub(crate) trait SealedPin {
     }
 }
 
-/// GPIO pin trait.
+/// GPIO pin number type.
+///
+/// Some chips have a total number of ports that exceeds 8, a larger integer
+/// is needed to hold the total pin number `(ports * number)`.
+#[cfg(not(stm32n6))]
+pub type PinNumber = u8;
+
+/// GPIO pin number type.
+///
+/// Some chips have a total number of ports that exceeds 8, a larger integer
+/// is needed to hold the total pin number `(ports * number)`.
+#[cfg(stm32n6)]
+pub type PinNumber = u16;
+
+/// Pin that can be used to configure an [ExtiInput](crate::exti::ExtiInput). This trait is lost when converting to [AnyPin].
+#[cfg(feature = "exti")]
 #[allow(private_bounds)]
-pub trait Pin: PeripheralType + Into<AnyPin> + SealedPin + Sized + 'static {
+pub trait ExtiPin: PeripheralType + SealedPin {
     /// EXTI channel assigned to this pin.
     ///
     /// For example, PC4 uses EXTI4.
-    #[cfg(feature = "exti")]
     type ExtiChannel: crate::exti::Channel;
+}
 
+/// GPIO pin trait.
+#[allow(private_bounds)]
+pub trait Pin: PeripheralType + Into<AnyPin> + SealedPin + Sized + 'static {
     /// Number of the pin within the port (0..31)
     #[inline]
-    fn pin(&self) -> u8 {
+    fn pin(&self) -> PinNumber {
         self._pin()
     }
 
     /// Port of the pin
     #[inline]
-    fn port(&self) -> u8 {
+    fn port(&self) -> PinNumber {
         self._port()
     }
 }
 
-/// Type-erased GPIO pin
+/// Type-erased GPIO pin.
 pub struct AnyPin {
-    pin_port: u8,
+    pin_port: PinNumber,
 }
 
 impl AnyPin {
@@ -830,12 +852,12 @@ impl AnyPin {
     ///
     /// `pin_port` is `port_num * 16 + pin_num`, where `port_num` is 0 for port `A`, 1 for port `B`, etc...
     #[inline]
-    pub unsafe fn steal(pin_port: u8) -> Peri<'static, Self> {
+    pub unsafe fn steal(pin_port: PinNumber) -> Peri<'static, Self> {
         Peri::new_unchecked(Self { pin_port })
     }
 
     #[inline]
-    fn _port(&self) -> u8 {
+    fn _port(&self) -> PinNumber {
         self.pin_port / 16
     }
 
@@ -848,13 +870,10 @@ impl AnyPin {
 }
 
 impl_peripheral!(AnyPin);
-impl Pin for AnyPin {
-    #[cfg(feature = "exti")]
-    type ExtiChannel = crate::exti::AnyChannel;
-}
+impl Pin for AnyPin {}
 impl SealedPin for AnyPin {
     #[inline]
-    fn pin_port(&self) -> u8 {
+    fn pin_port(&self) -> PinNumber {
         self.pin_port
     }
 }
@@ -864,12 +883,14 @@ impl SealedPin for AnyPin {
 foreach_pin!(
     ($pin_name:ident, $port_name:ident, $port_num:expr, $pin_num:expr, $exti_ch:ident) => {
         impl Pin for peripherals::$pin_name {
-            #[cfg(feature = "exti")]
+        }
+        #[cfg(feature = "exti")]
+        impl ExtiPin for peripherals::$pin_name {
             type ExtiChannel = peripherals::$exti_ch;
         }
         impl SealedPin for peripherals::$pin_name {
             #[inline]
-            fn pin_port(&self) -> u8 {
+            fn pin_port(&self) -> PinNumber {
                 $port_num * 16 + $pin_num
             }
         }