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authorxoviat <[email protected]>2023-09-10 13:33:17 -0500
committerxoviat <[email protected]>2023-09-10 13:33:17 -0500
commit08415e001e93a35579a8fc8e41147df96d80da84 (patch)
tree2dc48380b549dc5c366567d0dbb7e9a356486ef7 /embassy-stm32/src/hrtim
parenta47fb42962fffda51efbce072087c8ca2504a225 (diff)
stm32/f3: add high res for hrtim and misc.
Diffstat (limited to 'embassy-stm32/src/hrtim')
-rw-r--r--embassy-stm32/src/hrtim/mod.rs36
-rw-r--r--embassy-stm32/src/hrtim/traits.rs12
2 files changed, 37 insertions, 11 deletions
diff --git a/embassy-stm32/src/hrtim/mod.rs b/embassy-stm32/src/hrtim/mod.rs
index 31c488144..c47b0c092 100644
--- a/embassy-stm32/src/hrtim/mod.rs
+++ b/embassy-stm32/src/hrtim/mod.rs
@@ -8,6 +8,8 @@ pub use traits::Instance;
8#[allow(unused_imports)] 8#[allow(unused_imports)]
9use crate::gpio::sealed::{AFType, Pin}; 9use crate::gpio::sealed::{AFType, Pin};
10use crate::gpio::AnyPin; 10use crate::gpio::AnyPin;
11#[cfg(stm32f334)]
12use crate::rcc::get_freqs;
11use crate::time::Hertz; 13use crate::time::Hertz;
12use crate::Peripheral; 14use crate::Peripheral;
13 15
@@ -158,17 +160,29 @@ impl<'d, T: Instance> AdvancedPwm<'d, T> {
158 T::enable(); 160 T::enable();
159 <T as crate::rcc::sealed::RccPeripheral>::reset(); 161 <T as crate::rcc::sealed::RccPeripheral>::reset();
160 162
161 // // Enable and and stabilize the DLL 163 #[cfg(stm32f334)]
162 // T::regs().dllcr().modify(|w| { 164 if unsafe { get_freqs() }.hrtim.is_some() {
163 // // w.set_calen(true); 165 // Enable and and stabilize the DLL
164 // // w.set_calrte(11); 166 T::regs().dllcr().modify(|w| {
165 // w.set_cal(true); 167 w.set_cal(true);
166 // }); 168 });
167 // 169
168 // debug!("wait for dll calibration"); 170 trace!("hrtim: wait for dll calibration");
169 // while !T::regs().isr().read().dllrdy() {} 171 while !T::regs().isr().read().dllrdy() {}
170 // 172
171 // debug!("dll calibration complete"); 173 trace!("hrtim: dll calibration complete");
174
175 // Enable periodic calibration
176 // Cal must be disabled before we can enable it
177 T::regs().dllcr().modify(|w| {
178 w.set_cal(false);
179 });
180
181 T::regs().dllcr().modify(|w| {
182 w.set_calen(true);
183 w.set_calrte(11);
184 });
185 }
172 186
173 Self { 187 Self {
174 _inner: tim, 188 _inner: tim,
diff --git a/embassy-stm32/src/hrtim/traits.rs b/embassy-stm32/src/hrtim/traits.rs
index 095109598..37cfb9b90 100644
--- a/embassy-stm32/src/hrtim/traits.rs
+++ b/embassy-stm32/src/hrtim/traits.rs
@@ -104,7 +104,13 @@ foreach_interrupt! {
104 use crate::rcc::sealed::RccPeripheral; 104 use crate::rcc::sealed::RccPeripheral;
105 105
106 let f = frequency.0; 106 let f = frequency.0;
107 #[cfg(not(stm32f334))]
107 let timer_f = Self::frequency().0; 108 let timer_f = Self::frequency().0;
109 #[cfg(stm32f334)]
110 let timer_f = unsafe { crate::rcc::get_freqs() }.hrtim.unwrap_or(
111 Self::frequency()
112 ).0;
113
108 let psc_min = (timer_f / f) / (u16::MAX as u32 / 32); 114 let psc_min = (timer_f / f) / (u16::MAX as u32 / 32);
109 let psc = if Self::regs().isr().read().dllrdy() { 115 let psc = if Self::regs().isr().read().dllrdy() {
110 Prescaler::compute_min_high_res(psc_min) 116 Prescaler::compute_min_high_res(psc_min)
@@ -125,7 +131,13 @@ foreach_interrupt! {
125 use crate::rcc::sealed::RccPeripheral; 131 use crate::rcc::sealed::RccPeripheral;
126 132
127 let f = frequency.0; 133 let f = frequency.0;
134 #[cfg(not(stm32f334))]
128 let timer_f = Self::frequency().0; 135 let timer_f = Self::frequency().0;
136 #[cfg(stm32f334)]
137 let timer_f = unsafe { crate::rcc::get_freqs() }.hrtim.unwrap_or(
138 Self::frequency()
139 ).0;
140
129 let psc_min = (timer_f / f) / (u16::MAX as u32 / 32); 141 let psc_min = (timer_f / f) / (u16::MAX as u32 / 32);
130 let psc = if Self::regs().isr().read().dllrdy() { 142 let psc = if Self::regs().isr().read().dllrdy() {
131 Prescaler::compute_min_high_res(psc_min) 143 Prescaler::compute_min_high_res(psc_min)