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authorjrmoulton <[email protected]>2024-08-13 09:45:28 -0600
committerjrmoulton <[email protected]>2024-08-13 09:46:17 -0600
commitb4eb4a3d189efe5fe3716bb5dcd6396efcfab5c3 (patch)
tree10c6f7d61568dd264d5eb42d76d7424dee0f1d80 /embassy-stm32/src/i2c/mod.rs
parentd1f5a4c5c72787cfa7ce9e7c057714e3a272031f (diff)
remove 10 bit support
Diffstat (limited to 'embassy-stm32/src/i2c/mod.rs')
-rw-r--r--embassy-stm32/src/i2c/mod.rs68
1 files changed, 68 insertions, 0 deletions
diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs
index fed2e4714..6f952b8f8 100644
--- a/embassy-stm32/src/i2c/mod.rs
+++ b/embassy-stm32/src/i2c/mod.rs
@@ -333,6 +333,30 @@ foreach_peripheral!(
333 }; 333 };
334); 334);
335 335
336impl<'d, M: Mode, IM: MasterMode> embedded_hal_02::blocking::i2c::Read for I2c<'d, M, IM> {
337 type Error = Error;
338
339 fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
340 self.blocking_read(address, buffer)
341 }
342}
343
344impl<'d, M: Mode, IM: MasterMode> embedded_hal_02::blocking::i2c::Write for I2c<'d, M, IM> {
345 type Error = Error;
346
347 fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
348 self.blocking_write(address, write)
349 }
350}
351
352impl<'d, M: Mode, IM: MasterMode> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, M, IM> {
353 type Error = Error;
354
355 fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
356 self.blocking_write_read(address, write, read)
357 }
358}
359
336impl embedded_hal_1::i2c::Error for Error { 360impl embedded_hal_1::i2c::Error for Error {
337 fn kind(&self) -> embedded_hal_1::i2c::ErrorKind { 361 fn kind(&self) -> embedded_hal_1::i2c::ErrorKind {
338 match *self { 362 match *self {
@@ -353,6 +377,50 @@ impl<'d, M: Mode, IM: MasterMode> embedded_hal_1::i2c::ErrorType for I2c<'d, M,
353 type Error = Error; 377 type Error = Error;
354} 378}
355 379
380impl<'d, M: Mode, IM: MasterMode> embedded_hal_1::i2c::I2c for I2c<'d, M, IM> {
381 fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
382 self.blocking_read(address, read)
383 }
384
385 fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
386 self.blocking_write(address, write)
387 }
388
389 fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
390 self.blocking_write_read(address, write, read)
391 }
392
393 fn transaction(
394 &mut self,
395 address: u8,
396 operations: &mut [embedded_hal_1::i2c::Operation<'_>],
397 ) -> Result<(), Self::Error> {
398 self.blocking_transaction(address, operations)
399 }
400}
401
402impl<'d, IM: MasterMode> embedded_hal_async::i2c::I2c for I2c<'d, Async, IM> {
403 async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
404 self.read(address, read).await
405 }
406
407 async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
408 self.write(address, write).await
409 }
410
411 async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
412 self.write_read(address, write, read).await
413 }
414
415 async fn transaction(
416 &mut self,
417 address: u8,
418 operations: &mut [embedded_hal_1::i2c::Operation<'_>],
419 ) -> Result<(), Self::Error> {
420 self.transaction(address, operations).await
421 }
422}
423
356/// Frame type in I2C transaction. 424/// Frame type in I2C transaction.
357/// 425///
358/// This tells each method what kind of framing to use, to generate a (repeated) start condition (ST 426/// This tells each method what kind of framing to use, to generate a (repeated) start condition (ST