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authorJan Špaček <[email protected]>2024-05-24 22:04:04 +0200
committerJan Špaček <[email protected]>2024-05-25 18:44:55 +0200
commit081afca3f065dfd91e157d7c9a9477e2d914c99d (patch)
tree574b29636674d3e5a9e3763d00f709635856403e /embassy-stm32/src/lib.rs
parent01c1cb2764300625f80b24e70052f250de27d814 (diff)
stm32/rcc: replace generated enable/disable code with runtime info
Diffstat (limited to 'embassy-stm32/src/lib.rs')
-rw-r--r--embassy-stm32/src/lib.rs7
1 files changed, 3 insertions, 4 deletions
diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs
index 81ee60c1c..fe9c0dcb5 100644
--- a/embassy-stm32/src/lib.rs
+++ b/embassy-stm32/src/lib.rs
@@ -194,7 +194,6 @@ pub(crate) use stm32_metapac as pac;
194use crate::interrupt::Priority; 194use crate::interrupt::Priority;
195#[cfg(feature = "rt")] 195#[cfg(feature = "rt")]
196pub use crate::pac::NVIC_PRIO_BITS; 196pub use crate::pac::NVIC_PRIO_BITS;
197use crate::rcc::SealedRccPeripheral;
198 197
199/// `embassy-stm32` global configuration. 198/// `embassy-stm32` global configuration.
200#[non_exhaustive] 199#[non_exhaustive]
@@ -310,11 +309,11 @@ pub fn init(config: Config) -> Peripherals {
310 }); 309 });
311 310
312 #[cfg(not(any(stm32f1, stm32wb, stm32wl)))] 311 #[cfg(not(any(stm32f1, stm32wb, stm32wl)))]
313 peripherals::SYSCFG::enable_and_reset_with_cs(cs); 312 rcc::enable_and_reset_with_cs::<peripherals::SYSCFG>(cs);
314 #[cfg(not(any(stm32h5, stm32h7, stm32h7rs, stm32wb, stm32wl)))] 313 #[cfg(not(any(stm32h5, stm32h7, stm32h7rs, stm32wb, stm32wl)))]
315 peripherals::PWR::enable_and_reset_with_cs(cs); 314 rcc::enable_and_reset_with_cs::<peripherals::PWR>(cs);
316 #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7, stm32h7rs)))] 315 #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7, stm32h7rs)))]
317 peripherals::FLASH::enable_and_reset_with_cs(cs); 316 rcc::enable_and_reset_with_cs::<peripherals::FLASH>(cs);
318 317
319 // Enable the VDDIO2 power supply on chips that have it. 318 // Enable the VDDIO2 power supply on chips that have it.
320 // Note that this requires the PWR peripheral to be enabled first. 319 // Note that this requires the PWR peripheral to be enabled first.