diff options
| author | Christian Enderle <[email protected]> | 2023-12-26 11:58:38 +0100 |
|---|---|---|
| committer | Christian Enderle <[email protected]> | 2023-12-26 11:58:38 +0100 |
| commit | 30023c3bcccaffe4ff16d6600ba5ff80cf1ee488 (patch) | |
| tree | 851cb146bcf8725d432a342e32b68e8779335e37 /embassy-stm32/src/rtc/mod.rs | |
| parent | eebfee189a592427423d3a3ad22132d59926a0e8 (diff) | |
Add low-power support for stm32l5
Diffstat (limited to 'embassy-stm32/src/rtc/mod.rs')
| -rw-r--r-- | embassy-stm32/src/rtc/mod.rs | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/embassy-stm32/src/rtc/mod.rs b/embassy-stm32/src/rtc/mod.rs index 65e8713f0..1ffb567b3 100644 --- a/embassy-stm32/src/rtc/mod.rs +++ b/embassy-stm32/src/rtc/mod.rs | |||
| @@ -24,7 +24,7 @@ use crate::time::Hertz; | |||
| 24 | ), | 24 | ), |
| 25 | path = "v2.rs" | 25 | path = "v2.rs" |
| 26 | )] | 26 | )] |
| 27 | #[cfg_attr(any(rtc_v3, rtc_v3u5), path = "v3.rs")] | 27 | #[cfg_attr(any(rtc_v3, rtc_v3u5, rtc_v3l5), path = "v3.rs")] |
| 28 | mod _version; | 28 | mod _version; |
| 29 | #[allow(unused_imports)] | 29 | #[allow(unused_imports)] |
| 30 | pub use _version::*; | 30 | pub use _version::*; |
| @@ -43,7 +43,7 @@ pub(crate) enum WakeupPrescaler { | |||
| 43 | Div16 = 16, | 43 | Div16 = 16, |
| 44 | } | 44 | } |
| 45 | 45 | ||
| 46 | #[cfg(any(stm32wb, stm32f4, stm32l0, stm32g4))] | 46 | #[cfg(any(stm32wb, stm32f4, stm32l0, stm32g4, stm32l5))] |
| 47 | impl From<WakeupPrescaler> for crate::pac::rtc::vals::Wucksel { | 47 | impl From<WakeupPrescaler> for crate::pac::rtc::vals::Wucksel { |
| 48 | fn from(val: WakeupPrescaler) -> Self { | 48 | fn from(val: WakeupPrescaler) -> Self { |
| 49 | use crate::pac::rtc::vals::Wucksel; | 49 | use crate::pac::rtc::vals::Wucksel; |
| @@ -57,7 +57,7 @@ impl From<WakeupPrescaler> for crate::pac::rtc::vals::Wucksel { | |||
| 57 | } | 57 | } |
| 58 | } | 58 | } |
| 59 | 59 | ||
| 60 | #[cfg(any(stm32wb, stm32f4, stm32l0, stm32g4))] | 60 | #[cfg(any(stm32wb, stm32f4, stm32l0, stm32g4, stm32l5))] |
| 61 | impl From<crate::pac::rtc::vals::Wucksel> for WakeupPrescaler { | 61 | impl From<crate::pac::rtc::vals::Wucksel> for WakeupPrescaler { |
| 62 | fn from(val: crate::pac::rtc::vals::Wucksel) -> Self { | 62 | fn from(val: crate::pac::rtc::vals::Wucksel) -> Self { |
| 63 | use crate::pac::rtc::vals::Wucksel; | 63 | use crate::pac::rtc::vals::Wucksel; |
| @@ -348,7 +348,7 @@ impl Rtc { | |||
| 348 | ) { | 348 | ) { |
| 349 | use embassy_time::{Duration, TICK_HZ}; | 349 | use embassy_time::{Duration, TICK_HZ}; |
| 350 | 350 | ||
| 351 | #[cfg(any(rtc_v3, rtc_v3u5))] | 351 | #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] |
| 352 | use crate::pac::rtc::vals::Calrf; | 352 | use crate::pac::rtc::vals::Calrf; |
| 353 | 353 | ||
| 354 | // Panic if the rcc mod knows we're not using low-power rtc | 354 | // Panic if the rcc mod knows we're not using low-power rtc |
| @@ -375,7 +375,7 @@ impl Rtc { | |||
| 375 | while !regs.isr().read().wutwf() {} | 375 | while !regs.isr().read().wutwf() {} |
| 376 | } | 376 | } |
| 377 | 377 | ||
| 378 | #[cfg(any(rtc_v3, rtc_v3u5))] | 378 | #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] |
| 379 | { | 379 | { |
| 380 | regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR)); | 380 | regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR)); |
| 381 | while !regs.icsr().read().wutwf() {} | 381 | while !regs.icsr().read().wutwf() {} |
| @@ -404,7 +404,7 @@ impl Rtc { | |||
| 404 | /// was called, otherwise none | 404 | /// was called, otherwise none |
| 405 | pub(crate) fn stop_wakeup_alarm(&self, cs: critical_section::CriticalSection) -> Option<embassy_time::Duration> { | 405 | pub(crate) fn stop_wakeup_alarm(&self, cs: critical_section::CriticalSection) -> Option<embassy_time::Duration> { |
| 406 | use crate::interrupt::typelevel::Interrupt; | 406 | use crate::interrupt::typelevel::Interrupt; |
| 407 | #[cfg(any(rtc_v3, rtc_v3u5))] | 407 | #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] |
| 408 | use crate::pac::rtc::vals::Calrf; | 408 | use crate::pac::rtc::vals::Calrf; |
| 409 | 409 | ||
| 410 | let instant = self.instant().unwrap(); | 410 | let instant = self.instant().unwrap(); |
| @@ -420,13 +420,19 @@ impl Rtc { | |||
| 420 | ))] | 420 | ))] |
| 421 | regs.isr().modify(|w| w.set_wutf(false)); | 421 | regs.isr().modify(|w| w.set_wutf(false)); |
| 422 | 422 | ||
| 423 | #[cfg(any(rtc_v3, rtc_v3u5))] | 423 | #[cfg(any(rtc_v3, rtc_v3u5, rtc_v3l5))] |
| 424 | regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR)); | 424 | regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR)); |
| 425 | 425 | ||
| 426 | #[cfg(not(stm32l5))] | ||
| 426 | crate::pac::EXTI | 427 | crate::pac::EXTI |
| 427 | .pr(0) | 428 | .pr(0) |
| 428 | .modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); | 429 | .modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); |
| 429 | 430 | ||
| 431 | #[cfg(stm32l5)] | ||
| 432 | crate::pac::EXTI | ||
| 433 | .fpr(0) | ||
| 434 | .modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true)); | ||
| 435 | |||
| 430 | <RTC as crate::rtc::sealed::Instance>::WakeupInterrupt::unpend(); | 436 | <RTC as crate::rtc::sealed::Instance>::WakeupInterrupt::unpend(); |
| 431 | }); | 437 | }); |
| 432 | } | 438 | } |
