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authorelagil <[email protected]>2025-01-03 18:18:00 +0100
committerelagil <[email protected]>2025-01-03 18:18:00 +0100
commiteba8089601450fdf2a666f3d3316c8412cadf470 (patch)
tree4c640afd25b54be360db721c765b87abac1e05d1 /embassy-stm32/src/rtc
parent96819805ea12af548636e1e2bbeaf02f20f27847 (diff)
chore: fix build
Diffstat (limited to 'embassy-stm32/src/rtc')
-rw-r--r--embassy-stm32/src/rtc/v2.rs4
-rw-r--r--embassy-stm32/src/rtc/v3.rs12
2 files changed, 8 insertions, 8 deletions
diff --git a/embassy-stm32/src/rtc/v2.rs b/embassy-stm32/src/rtc/v2.rs
index 5d9025bbe..b7d25635b 100644
--- a/embassy-stm32/src/rtc/v2.rs
+++ b/embassy-stm32/src/rtc/v2.rs
@@ -77,7 +77,7 @@ impl super::Rtc {
77 // When the offset is positive (0 to 512), the opposite of 77 // When the offset is positive (0 to 512), the opposite of
78 // the offset (512 - offset) is masked, i.e. for the 78 // the offset (512 - offset) is masked, i.e. for the
79 // maximum offset (512), 0 pulses are masked. 79 // maximum offset (512), 0 pulses are masked.
80 w.set_calp(stm32_metapac::rtc::vals::Calp::INCREASEFREQ); 80 w.set_calp(stm32_metapac::rtc::vals::Calp::INCREASE_FREQ);
81 w.set_calm(512 - clock_drift as u16); 81 w.set_calm(512 - clock_drift as u16);
82 } else { 82 } else {
83 // Minimum (about -510.7) rounds to -511. 83 // Minimum (about -510.7) rounds to -511.
@@ -86,7 +86,7 @@ impl super::Rtc {
86 // When the offset is negative or zero (-511 to 0), 86 // When the offset is negative or zero (-511 to 0),
87 // the absolute offset is masked, i.e. for the minimum 87 // the absolute offset is masked, i.e. for the minimum
88 // offset (-511), 511 pulses are masked. 88 // offset (-511), 511 pulses are masked.
89 w.set_calp(stm32_metapac::rtc::vals::Calp::NOCHANGE); 89 w.set_calp(stm32_metapac::rtc::vals::Calp::NO_CHANGE);
90 w.set_calm((clock_drift * -1.0) as u16); 90 w.set_calm((clock_drift * -1.0) as u16);
91 } 91 }
92 }); 92 });
diff --git a/embassy-stm32/src/rtc/v3.rs b/embassy-stm32/src/rtc/v3.rs
index de2c202bc..39aa6c5cb 100644
--- a/embassy-stm32/src/rtc/v3.rs
+++ b/embassy-stm32/src/rtc/v3.rs
@@ -12,7 +12,7 @@ impl super::Rtc {
12 self.write(true, |rtc| { 12 self.write(true, |rtc| {
13 rtc.cr().modify(|w| { 13 rtc.cr().modify(|w| {
14 w.set_bypshad(true); 14 w.set_bypshad(true);
15 w.set_fmt(Fmt::TWENTYFOURHOUR); 15 w.set_fmt(Fmt::TWENTY_FOUR_HOUR);
16 w.set_osel(Osel::DISABLED); 16 w.set_osel(Osel::DISABLED);
17 w.set_pol(Pol::HIGH); 17 w.set_pol(Pol::HIGH);
18 }); 18 });
@@ -25,7 +25,7 @@ impl super::Rtc {
25 // TODO: configuration for output pins 25 // TODO: configuration for output pins
26 rtc.cr().modify(|w| { 26 rtc.cr().modify(|w| {
27 w.set_out2en(false); 27 w.set_out2en(false);
28 w.set_tampalrm_type(TampalrmType::PUSHPULL); 28 w.set_tampalrm_type(TampalrmType::PUSH_PULL);
29 w.set_tampalrm_pu(false); 29 w.set_tampalrm_pu(false);
30 }); 30 });
31 }); 31 });
@@ -56,10 +56,10 @@ impl super::Rtc {
56 rtc.calr().write(|w| { 56 rtc.calr().write(|w| {
57 match period { 57 match period {
58 RtcCalibrationCyclePeriod::Seconds8 => { 58 RtcCalibrationCyclePeriod::Seconds8 => {
59 w.set_calw8(Calw8::EIGHTSECONDS); 59 w.set_calw8(Calw8::EIGHT_SECONDS);
60 } 60 }
61 RtcCalibrationCyclePeriod::Seconds16 => { 61 RtcCalibrationCyclePeriod::Seconds16 => {
62 w.set_calw16(Calw16::SIXTEENSECONDS); 62 w.set_calw16(Calw16::SIXTEEN_SECONDS);
63 } 63 }
64 RtcCalibrationCyclePeriod::Seconds32 => { 64 RtcCalibrationCyclePeriod::Seconds32 => {
65 // Set neither `calw8` nor `calw16` to use 32 seconds 65 // Set neither `calw8` nor `calw16` to use 32 seconds
@@ -79,7 +79,7 @@ impl super::Rtc {
79 // When the offset is positive (0 to 512), the opposite of 79 // When the offset is positive (0 to 512), the opposite of
80 // the offset (512 - offset) is masked, i.e. for the 80 // the offset (512 - offset) is masked, i.e. for the
81 // maximum offset (512), 0 pulses are masked. 81 // maximum offset (512), 0 pulses are masked.
82 w.set_calp(Calp::INCREASEFREQ); 82 w.set_calp(Calp::INCREASE_FREQ);
83 w.set_calm(512 - clock_drift as u16); 83 w.set_calm(512 - clock_drift as u16);
84 } else { 84 } else {
85 // Minimum (about -510.7) rounds to -511. 85 // Minimum (about -510.7) rounds to -511.
@@ -88,7 +88,7 @@ impl super::Rtc {
88 // When the offset is negative or zero (-511 to 0), 88 // When the offset is negative or zero (-511 to 0),
89 // the absolute offset is masked, i.e. for the minimum 89 // the absolute offset is masked, i.e. for the minimum
90 // offset (-511), 511 pulses are masked. 90 // offset (-511), 511 pulses are masked.
91 w.set_calp(Calp::NOCHANGE); 91 w.set_calp(Calp::NO_CHANGE);
92 w.set_calm((clock_drift * -1.0) as u16); 92 w.set_calm((clock_drift * -1.0) as u16);
93 } 93 }
94 }); 94 });