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authoretiennecollin <[email protected]>2025-08-25 21:10:59 +0200
committerDario Nieuwenhuis <[email protected]>2025-09-05 14:43:29 +0200
commit50e2e2ec60ca32a2da53b91f4a30c3a71d4e9f30 (patch)
treeffaed485eb5b2300b938d8093b3ea03efe4e6e81 /embassy-stm32/src/sai
parent4291a092bedb0f45d236a1847a9b85fd093d3af9 (diff)
feat: add new_with_table() initializer for ring-buffers and removal of RegisterUpdaters
- It is now possible to pass a linked-list table to the ring-buffer with the `new_with_table()` function or use the `new()` function for a basic ring-buffer setup. - A `simple_ring_buffer_table()` function was added to the read and write ring-buffers to generate the same table as the one created by `new()` in case the user only wants to customize the default table options. - RegisterUpdaters have been removed as the user now has direct access to the table and its items if needed. See: https://github.com/elagil/embassy/pull/1#issuecomment-2891997294
Diffstat (limited to 'embassy-stm32/src/sai')
-rw-r--r--embassy-stm32/src/sai/mod.rs9
1 files changed, 4 insertions, 5 deletions
diff --git a/embassy-stm32/src/sai/mod.rs b/embassy-stm32/src/sai/mod.rs
index ac1ab2505..410b2243c 100644
--- a/embassy-stm32/src/sai/mod.rs
+++ b/embassy-stm32/src/sai/mod.rs
@@ -650,8 +650,8 @@ impl Config {
650} 650}
651 651
652enum RingBuffer<'d, W: word::Word> { 652enum RingBuffer<'d, W: word::Word> {
653 Writable(WritableRingBuffer<'d, W>), 653 Writable(WritableRingBuffer<'d, W, 2>),
654 Readable(ReadableRingBuffer<'d, W>), 654 Readable(ReadableRingBuffer<'d, W, 2>),
655} 655}
656 656
657fn dr<W: word::Word>(w: crate::pac::sai::Sai, sub_block: WhichSubBlock) -> *mut W { 657fn dr<W: word::Word>(w: crate::pac::sai::Sai, sub_block: WhichSubBlock) -> *mut W {
@@ -687,13 +687,12 @@ fn get_ring_buffer<'d, T: Instance, W: word::Word>(
687 //the new_write() and new_read() always use circular mode 687 //the new_write() and new_read() always use circular mode
688 ..Default::default() 688 ..Default::default()
689 }; 689 };
690 let updaters = Default::default();
691 match tx_rx { 690 match tx_rx {
692 TxRx::Transmitter => RingBuffer::Writable(unsafe { 691 TxRx::Transmitter => RingBuffer::Writable(unsafe {
693 WritableRingBuffer::new(dma, request, dr(T::REGS, sub_block), dma_buf, opts, updaters) 692 WritableRingBuffer::new(dma, request, dr(T::REGS, sub_block), dma_buf, opts)
694 }), 693 }),
695 TxRx::Receiver => RingBuffer::Readable(unsafe { 694 TxRx::Receiver => RingBuffer::Readable(unsafe {
696 ReadableRingBuffer::new(dma, request, dr(T::REGS, sub_block), dma_buf, opts, updaters) 695 ReadableRingBuffer::new(dma, request, dr(T::REGS, sub_block), dma_buf, opts)
697 }), 696 }),
698 } 697 }
699} 698}