diff options
| author | René van Dorst <[email protected]> | 2024-03-20 19:59:17 +0100 |
|---|---|---|
| committer | René van Dorst <[email protected]> | 2024-03-20 19:59:17 +0100 |
| commit | fb9d42684bed1d0625da5b582e64c5fa56b7fd01 (patch) | |
| tree | 6cfe58c21bd34769615c9fce581aaa49acde717a /embassy-stm32/src/timer/mod.rs | |
| parent | 3845288ffb0418cc375430dd366a1a49ccee6f5a (diff) | |
stm32: Fix psc compile error with current stm32-data
Commit https://github.com/embassy-rs/stm32-data/commit/cc525f1b252c91272529cbea1d3d4399b43c60b4 has changed the definition of the `psc` register.
Update timer/mod.rs to reflect the stm32-data change.
Diffstat (limited to 'embassy-stm32/src/timer/mod.rs')
| -rw-r--r-- | embassy-stm32/src/timer/mod.rs | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/embassy-stm32/src/timer/mod.rs b/embassy-stm32/src/timer/mod.rs index ef893c7f5..e5e84c255 100644 --- a/embassy-stm32/src/timer/mod.rs +++ b/embassy-stm32/src/timer/mod.rs | |||
| @@ -97,7 +97,7 @@ pub(crate) mod sealed { | |||
| 97 | let arr = unwrap!(u16::try_from(divide_by - 1)); | 97 | let arr = unwrap!(u16::try_from(divide_by - 1)); |
| 98 | 98 | ||
| 99 | let regs = Self::regs_core(); | 99 | let regs = Self::regs_core(); |
| 100 | regs.psc().write(|r| r.set_psc(psc)); | 100 | regs.psc().write_value(psc); |
| 101 | regs.arr().write(|r| r.set_arr(arr)); | 101 | regs.arr().write(|r| r.set_arr(arr)); |
| 102 | 102 | ||
| 103 | regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY)); | 103 | regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY)); |
| @@ -137,7 +137,7 @@ pub(crate) mod sealed { | |||
| 137 | 137 | ||
| 138 | let regs = Self::regs_core(); | 138 | let regs = Self::regs_core(); |
| 139 | let arr = regs.arr().read().arr(); | 139 | let arr = regs.arr().read().arr(); |
| 140 | let psc = regs.psc().read().psc(); | 140 | let psc = regs.psc().read(); |
| 141 | 141 | ||
| 142 | timer_f / arr / (psc + 1) | 142 | timer_f / arr / (psc + 1) |
| 143 | } | 143 | } |
| @@ -378,7 +378,7 @@ pub(crate) mod sealed { | |||
| 378 | let arr: u32 = unwrap!((pclk_ticks_per_timer_period / (psc as u64 + 1)).try_into()); | 378 | let arr: u32 = unwrap!((pclk_ticks_per_timer_period / (psc as u64 + 1)).try_into()); |
| 379 | 379 | ||
| 380 | let regs = Self::regs_gp32(); | 380 | let regs = Self::regs_gp32(); |
| 381 | regs.psc().write(|r| r.set_psc(psc)); | 381 | regs.psc().write_value(psc); |
| 382 | regs.arr().write_value(arr); | 382 | regs.arr().write_value(arr); |
| 383 | 383 | ||
| 384 | regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY)); | 384 | regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY)); |
| @@ -392,7 +392,7 @@ pub(crate) mod sealed { | |||
| 392 | 392 | ||
| 393 | let regs = Self::regs_gp32(); | 393 | let regs = Self::regs_gp32(); |
| 394 | let arr = regs.arr().read(); | 394 | let arr = regs.arr().read(); |
| 395 | let psc = regs.psc().read().psc(); | 395 | let psc = regs.psc().read(); |
| 396 | 396 | ||
| 397 | timer_f / arr / (psc + 1) | 397 | timer_f / arr / (psc + 1) |
| 398 | } | 398 | } |
