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authorBruno Bousquet <[email protected]>2024-05-30 17:43:38 -0400
committerBruno Bousquet <[email protected]>2024-05-30 17:43:53 -0400
commit84707af5d7f3e62caafed06c416cf12fa82e4664 (patch)
tree2f5a34ed76944338a5b6634f439df17637e1dba6 /embassy-stm32/src/timer/pwm_input.rs
parenta87b33303403ba3601d0c631b9efe1cb3853c73b (diff)
create functions in inner to handle register modification
Diffstat (limited to 'embassy-stm32/src/timer/pwm_input.rs')
-rw-r--r--embassy-stm32/src/timer/pwm_input.rs42
1 files changed, 11 insertions, 31 deletions
diff --git a/embassy-stm32/src/timer/pwm_input.rs b/embassy-stm32/src/timer/pwm_input.rs
index 7bcb7802a..dcf098a78 100644
--- a/embassy-stm32/src/timer/pwm_input.rs
+++ b/embassy-stm32/src/timer/pwm_input.rs
@@ -2,7 +2,7 @@
2 2
3use embassy_hal_internal::into_ref; 3use embassy_hal_internal::into_ref;
4 4
5use super::low_level::{CountingMode, InputCaptureMode, InputTISelection, Timer}; 5use super::low_level::{CountingMode, InputCaptureMode, InputTISelection, SlaveMode, Timer, TriggerSource};
6use super::{Channel, Channel1Pin, Channel2Pin, GeneralInstance4Channel}; 6use super::{Channel, Channel1Pin, Channel2Pin, GeneralInstance4Channel};
7use crate::gpio::{AFType, Pull}; 7use crate::gpio::{AFType, Pull};
8use crate::time::Hertz; 8use crate::time::Hertz;
@@ -14,11 +14,6 @@ pub struct PwmInput<'d, T: GeneralInstance4Channel> {
14 inner: Timer<'d, T>, 14 inner: Timer<'d, T>,
15} 15}
16 16
17/// Convert pointer to TIM instance to TimGp16 object
18fn regs_gp16(ptr: *mut ()) -> crate::pac::timer::TimGp16 {
19 unsafe { crate::pac::timer::TimGp16::from_ptr(ptr) }
20}
21
22impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> { 17impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> {
23 /// Create a new PWM input driver. 18 /// Create a new PWM input driver.
24 pub fn new( 19 pub fn new(
@@ -28,11 +23,8 @@ impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> {
28 freq: Hertz, 23 freq: Hertz,
29 ) -> Self { 24 ) -> Self {
30 into_ref!(pin); 25 into_ref!(pin);
31 critical_section::with(|_| { 26
32 pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); 27 pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type);
33 #[cfg(gpio_v2)]
34 pin.set_speed(crate::gpio::Speed::VeryHigh);
35 });
36 28
37 Self::new_inner(tim, freq, Channel::Ch1, Channel::Ch2) 29 Self::new_inner(tim, freq, Channel::Ch1, Channel::Ch2)
38 } 30 }
@@ -45,18 +37,13 @@ impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> {
45 freq: Hertz, 37 freq: Hertz,
46 ) -> Self { 38 ) -> Self {
47 into_ref!(pin); 39 into_ref!(pin);
48 critical_section::with(|_| { 40
49 pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type); 41 pin.set_as_af_pull(pin.af_num(), AFType::Input, pull_type);
50 #[cfg(gpio_v2)]
51 pin.set_speed(crate::gpio::Speed::VeryHigh);
52 });
53 42
54 Self::new_inner(tim, freq, Channel::Ch2, Channel::Ch1) 43 Self::new_inner(tim, freq, Channel::Ch2, Channel::Ch1)
55 } 44 }
56 45
57 fn new_inner(tim: impl Peripheral<P = T> + 'd, freq: Hertz, ch1: Channel, ch2: Channel) -> Self { 46 fn new_inner(tim: impl Peripheral<P = T> + 'd, freq: Hertz, ch1: Channel, ch2: Channel) -> Self {
58 use stm32_metapac::timer::vals::{Sms, Ts};
59
60 let mut inner = Timer::new(tim); 47 let mut inner = Timer::new(tim);
61 48
62 inner.set_counting_mode(CountingMode::EdgeAlignedUp); 49 inner.set_counting_mode(CountingMode::EdgeAlignedUp);
@@ -72,21 +59,14 @@ impl<'d, T: GeneralInstance4Channel> PwmInput<'d, T> {
72 inner.set_input_ti_selection(ch2, InputTISelection::Alternate); 59 inner.set_input_ti_selection(ch2, InputTISelection::Alternate);
73 inner.set_input_capture_mode(ch2, InputCaptureMode::Falling); 60 inner.set_input_capture_mode(ch2, InputCaptureMode::Falling);
74 61
75 let regs = regs_gp16(T::regs()); 62 inner.set_trigger_source(match ch1 {
76 regs.smcr().modify(|r| { 63 Channel::Ch1 => TriggerSource::TI1FP1,
77 // Select the valid trigger input: write the TS bits to 101 in the TIMx_SMCR register 64 Channel::Ch2 => TriggerSource::TI2FP2,
78 // (TI1FP1 selected). 65 _ => panic!("Invalid channel for PWM input"),
79 r.set_ts(match ch1 {
80 Channel::Ch1 => Ts::TI1FP1,
81 Channel::Ch2 => Ts::TI2FP2,
82 _ => panic!("Invalid channel for PWM input"),
83 });
84
85 // Configure the slave mode controller in reset mode: write the SMS bits to 100 in the
86 // TIMx_SMCR register.
87 r.set_sms(Sms::RESET_MODE);
88 }); 66 });
89 67
68 inner.set_slave_mode(SlaveMode::RESET_MODE);
69
90 // Must call the `enable` function after 70 // Must call the `enable` function after
91 71
92 Self { channel: ch1, inner } 72 Self { channel: ch1, inner }