diff options
| author | pbert <[email protected]> | 2023-10-11 21:38:41 +0200 |
|---|---|---|
| committer | pbert <[email protected]> | 2023-10-12 11:04:44 +0200 |
| commit | ecdd7c0e2f9dcc07e53e136557140d3ccc6a5ee1 (patch) | |
| tree | 6db9bf875d3e83d94f6bf8e8a2e7ff03a83c5bb4 /embassy-stm32/src/timer/qei.rs | |
| parent | d7d79f3068a4a2d883b078b8900ad194f7c98203 (diff) | |
enable clock first
Diffstat (limited to 'embassy-stm32/src/timer/qei.rs')
| -rw-r--r-- | embassy-stm32/src/timer/qei.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/embassy-stm32/src/timer/qei.rs b/embassy-stm32/src/timer/qei.rs index ecc9fabc7..01d028bf9 100644 --- a/embassy-stm32/src/timer/qei.rs +++ b/embassy-stm32/src/timer/qei.rs | |||
| @@ -55,7 +55,7 @@ impl<'d, T: CaptureCompare16bitInstance> Qei<'d, T> { | |||
| 55 | fn new_inner(tim: impl Peripheral<P = T> + 'd) -> Self { | 55 | fn new_inner(tim: impl Peripheral<P = T> + 'd) -> Self { |
| 56 | into_ref!(tim); | 56 | into_ref!(tim); |
| 57 | 57 | ||
| 58 | T::reset_and_enable(); | 58 | T::enable_and_reset(); |
| 59 | 59 | ||
| 60 | // Configure TxC1 and TxC2 as captures | 60 | // Configure TxC1 and TxC2 as captures |
| 61 | T::regs_gp16().ccmr_input(0).modify(|w| { | 61 | T::regs_gp16().ccmr_input(0).modify(|w| { |