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authorTimo Kröger <[email protected]>2024-03-12 20:38:37 +0100
committerTimo Kröger <[email protected]>2024-03-14 21:55:05 +0100
commite95e95ac7a00ca014b23f6ac57ecffce7fc6ffa0 (patch)
treeade463c0e01e34f828724e415830553d097f20ad /embassy-stm32/src/ucpd.rs
parent30cdc6c9c53837e91f92d24e9861b525f54bc65b (diff)
[UCPD] Take interrupt in constructor and enable it
Diffstat (limited to 'embassy-stm32/src/ucpd.rs')
-rw-r--r--embassy-stm32/src/ucpd.rs6
1 files changed, 6 insertions, 0 deletions
diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs
index 51cfe4a24..b7af877b7 100644
--- a/embassy-stm32/src/ucpd.rs
+++ b/embassy-stm32/src/ucpd.rs
@@ -24,6 +24,7 @@ use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
24 24
25use crate::dma::{AnyChannel, Request, Transfer, TransferOptions}; 25use crate::dma::{AnyChannel, Request, Transfer, TransferOptions};
26use crate::interrupt; 26use crate::interrupt;
27use crate::interrupt::typelevel::Interrupt;
27use crate::pac::ucpd::vals::{Anamode, Ccenable, PscUsbpdclk, Txmode}; 28use crate::pac::ucpd::vals::{Anamode, Ccenable, PscUsbpdclk, Txmode};
28pub use crate::pac::ucpd::vals::{Phyccsel as CcSel, TypecVstateCc as CcVState}; 29pub use crate::pac::ucpd::vals::{Phyccsel as CcSel, TypecVstateCc as CcVState};
29use crate::rcc::RccPeripheral; 30use crate::rcc::RccPeripheral;
@@ -93,10 +94,13 @@ impl<'d, T: Instance> Ucpd<'d, T> {
93 /// Creates a new UCPD driver instance. 94 /// Creates a new UCPD driver instance.
94 pub fn new( 95 pub fn new(
95 _peri: impl Peripheral<P = T> + 'd, 96 _peri: impl Peripheral<P = T> + 'd,
97 _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
96 _cc1: impl Peripheral<P = impl Cc1Pin<T>> + 'd, 98 _cc1: impl Peripheral<P = impl Cc1Pin<T>> + 'd,
97 _cc2: impl Peripheral<P = impl Cc2Pin<T>> + 'd, 99 _cc2: impl Peripheral<P = impl Cc2Pin<T>> + 'd,
98 ) -> Self { 100 ) -> Self {
99 T::enable_and_reset(); 101 T::enable_and_reset();
102 T::Interrupt::unpend();
103 unsafe { T::Interrupt::enable() };
100 104
101 let r = T::REGS; 105 let r = T::REGS;
102 r.cfgr1().write(|w| { 106 r.cfgr1().write(|w| {
@@ -206,6 +210,7 @@ impl<'d, T: Instance> Drop for CcPhy<'d, T> {
206 } else { 210 } else {
207 r.cfgr1().write(|w| w.set_ucpden(false)); 211 r.cfgr1().write(|w| w.set_ucpden(false));
208 T::disable(); 212 T::disable();
213 T::Interrupt::disable();
209 } 214 }
210 } 215 }
211} 216}
@@ -323,6 +328,7 @@ impl<'d, T: Instance> Drop for PdPhy<'d, T> {
323 } else { 328 } else {
324 r.cfgr1().write(|w| w.set_ucpden(false)); 329 r.cfgr1().write(|w| w.set_ucpden(false));
325 T::disable(); 330 T::disable();
331 T::Interrupt::disable();
326 } 332 }
327 } 333 }
328} 334}