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authorGabriel Smith <[email protected]>2025-06-13 12:59:56 +0000
committerGabriel Smith <[email protected]>2025-08-22 14:56:19 -0400
commit5a1be543ac8838963a6597dda2ddf3918397e39b (patch)
tree2a5affe05d84f1e57d0e1fb8292131639bbfc116 /embassy-stm32/src
parentd65a5078f26f860881b2f4a0db84e0d8f3160624 (diff)
stm32/adc/v3: allow DMA reads to loop through enabled channels
Tested on an STM32H533RE. Documentation of other chips has been reviewed, but not extensively.
Diffstat (limited to 'embassy-stm32/src')
-rw-r--r--embassy-stm32/src/adc/v3.rs7
1 files changed, 4 insertions, 3 deletions
diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs
index a2e42fe52..dc1faa4d1 100644
--- a/embassy-stm32/src/adc/v3.rs
+++ b/embassy-stm32/src/adc/v3.rs
@@ -296,7 +296,8 @@ impl<'d, T: Instance> Adc<'d, T> {
296 296
297 /// Read one or multiple ADC channels using DMA. 297 /// Read one or multiple ADC channels using DMA.
298 /// 298 ///
299 /// `sequence` iterator and `readings` must have the same length. 299 /// `readings` must have a length that is a multiple of the length of the
300 /// `sequence` iterator.
300 /// 301 ///
301 /// Note: The order of values in `readings` is defined by the pin ADC 302 /// Note: The order of values in `readings` is defined by the pin ADC
302 /// channel number and not the pin order in `sequence`. 303 /// channel number and not the pin order in `sequence`.
@@ -330,8 +331,8 @@ impl<'d, T: Instance> Adc<'d, T> {
330 ) { 331 ) {
331 assert!(sequence.len() != 0, "Asynchronous read sequence cannot be empty"); 332 assert!(sequence.len() != 0, "Asynchronous read sequence cannot be empty");
332 assert!( 333 assert!(
333 sequence.len() == readings.len(), 334 readings.len() % sequence.len() == 0,
334 "Sequence length must be equal to readings length" 335 "Readings length must be a multiple of sequence length"
335 ); 336 );
336 assert!( 337 assert!(
337 sequence.len() <= 16, 338 sequence.len() <= 16,