Merge pull request #2711 from embassy-rs/stm32-usb-clock-check

stm32/usb: assert correct clock on init, set mux in all examples.

5 files changed, 254 insertions, 248 deletions

diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs
index b38b5c29d..9e26a3513 100644
--- a/embassy-stm32/src/lib.rs
+++ b/embassy-stm32/src/lib.rs
@@ -79,10 +79,8 @@ pub mod ucpd;
 pub mod uid;
 #[cfg(usart)]
 pub mod usart;
-#[cfg(usb)]
+#[cfg(any(usb, otg))]
 pub mod usb;
-#[cfg(otg)]
-pub mod usb_otg;
 #[cfg(iwdg)]
 pub mod wdg;
 
@@ -107,10 +105,10 @@ pub use crate::_generated::interrupt;
 /// Example of how to bind one interrupt:
 ///
 /// ```rust,ignore
-/// use embassy_stm32::{bind_interrupts, usb_otg, peripherals};
+/// use embassy_stm32::{bind_interrupts, usb, peripherals};
 ///
 /// bind_interrupts!(struct Irqs {
-///     OTG_FS => usb_otg::InterruptHandler<peripherals::USB_OTG_FS>;
+///     OTG_FS => usb::InterruptHandler<peripherals::USB_OTG_FS>;
 /// });
 /// ```
 ///
diff --git a/embassy-stm32/src/usb/mod.rs b/embassy-stm32/src/usb/mod.rs
index 4debd4e54..788f61f16 100644
--- a/embassy-stm32/src/usb/mod.rs
+++ b/embassy-stm32/src/usb/mod.rs
@@ -1,37 +1,69 @@
 //! Universal Serial Bus (USB)
 
-use crate::interrupt;
-use crate::rcc::RccPeripheral;
+#[cfg_attr(usb, path = "usb.rs")]
+#[cfg_attr(otg, path = "otg.rs")]
+mod _version;
+pub use _version::*;
 
-mod usb;
-pub use usb::*;
+use crate::interrupt::typelevel::Interrupt;
+use crate::rcc::sealed::RccPeripheral;
 
-pub(crate) mod sealed {
-    pub trait Instance {
-        fn regs() -> crate::pac::usb::Usb;
+/// clock, power initialization stuff that's common for USB and OTG.
+fn common_init<T: Instance>() {
+    // Check the USB clock is enabled and running at exactly 48 MHz.
+    // frequency() will panic if not enabled
+    let freq = T::frequency();
+    // Check frequency is within the 0.25% tolerance allowed by the spec.
+    // Clock might not be exact 48Mhz due to rounding errors in PLL calculation, or if the user
+    // has tight clock restrictions due to something else (like audio).
+    if freq.0.abs_diff(48_000_000) > 120_000 {
+        panic!(
+            "USB clock should be 48Mhz but is {} Hz. Please double-check your RCC settings.",
+            freq.0
+        )
     }
-}
 
-/// USB instance trait.
-pub trait Instance: sealed::Instance + RccPeripheral + 'static {
-    /// Interrupt for this USB instance.
-    type Interrupt: interrupt::typelevel::Interrupt;
-}
+    #[cfg(any(stm32l4, stm32l5, stm32wb))]
+    critical_section::with(|_| crate::pac::PWR.cr2().modify(|w| w.set_usv(true)));
+
+    #[cfg(pwr_h5)]
+    critical_section::with(|_| crate::pac::PWR.usbscr().modify(|w| w.set_usb33sv(true)));
+
+    #[cfg(stm32h7)]
+    {
+        // If true, VDD33USB is generated by internal regulator from VDD50USB
+        // If false, VDD33USB and VDD50USB must be suplied directly with 3.3V (default on nucleo)
+        // TODO: unhardcode
+        let internal_regulator = false;
+
+        // Enable USB power
+        critical_section::with(|_| {
+            crate::pac::PWR.cr3().modify(|w| {
+                w.set_usb33den(true);
+                w.set_usbregen(internal_regulator);
+            })
+        });
+
+        // Wait for USB power to stabilize
+        while !crate::pac::PWR.cr3().read().usb33rdy() {}
+    }
+
+    #[cfg(stm32u5)]
+    {
+        // Enable USB power
+        critical_section::with(|_| {
+            crate::pac::PWR.svmcr().modify(|w| {
+                w.set_usv(true);
+                w.set_uvmen(true);
+            })
+        });
+
+        // Wait for USB power to stabilize
+        while !crate::pac::PWR.svmsr().read().vddusbrdy() {}
+    }
+
+    T::Interrupt::unpend();
+    unsafe { T::Interrupt::enable() };
 
-// Internal PHY pins
-pin_trait!(DpPin, Instance);
-pin_trait!(DmPin, Instance);
-
-foreach_interrupt!(
-    ($inst:ident, usb, $block:ident, LP, $irq:ident) => {
-        impl sealed::Instance for crate::peripherals::$inst {
-            fn regs() -> crate::pac::usb::Usb {
-                crate::pac::$inst
-            }
-        }
-
-        impl Instance for crate::peripherals::$inst {
-            type Interrupt = crate::interrupt::typelevel::$irq;
-        }
-    };
-);
+    <T as RccPeripheral>::enable_and_reset();
+}
diff --git a/embassy-stm32/src/usb_otg/usb.rs b/embassy-stm32/src/usb/otg.rs
index 373697ec8..80a08f3c5 100644
--- a/embassy-stm32/src/usb_otg/usb.rs
+++ b/embassy-stm32/src/usb/otg.rs
@@ -11,7 +11,6 @@ use embassy_usb_driver::{
 };
 use futures::future::poll_fn;
 
-use super::*;
 use crate::gpio::sealed::AFType;
 use crate::interrupt;
 use crate::interrupt::typelevel::Interrupt;
@@ -561,8 +560,7 @@ impl<'d, T: Instance> Bus<'d, T> {
 
 impl<'d, T: Instance> Bus<'d, T> {
     fn init(&mut self) {
-        #[cfg(stm32l4)]
-        critical_section::with(|_| crate::pac::PWR.cr2().modify(|w| w.set_usv(true)));
+        super::common_init::<T>();
 
         #[cfg(stm32f7)]
         {
@@ -590,22 +588,6 @@ impl<'d, T: Instance> Bus<'d, T> {
 
         #[cfg(stm32h7)]
         {
-            // If true, VDD33USB is generated by internal regulator from VDD50USB
-            // If false, VDD33USB and VDD50USB must be suplied directly with 3.3V (default on nucleo)
-            // TODO: unhardcode
-            let internal_regulator = false;
-
-            // Enable USB power
-            critical_section::with(|_| {
-                crate::pac::PWR.cr3().modify(|w| {
-                    w.set_usb33den(true);
-                    w.set_usbregen(internal_regulator);
-                })
-            });
-
-            // Wait for USB power to stabilize
-            while !crate::pac::PWR.cr3().read().usb33rdy() {}
-
             // Enable ULPI clock if external PHY is used
             let ulpien = !self.phy_type.internal();
             critical_section::with(|_| {
@@ -626,25 +608,6 @@ impl<'d, T: Instance> Bus<'d, T> {
             });
         }
 
-        #[cfg(stm32u5)]
-        {
-            // Enable USB power
-            critical_section::with(|_| {
-                crate::pac::PWR.svmcr().modify(|w| {
-                    w.set_usv(true);
-                    w.set_uvmen(true);
-                })
-            });
-
-            // Wait for USB power to stabilize
-            while !crate::pac::PWR.svmsr().read().vddusbrdy() {}
-        }
-
-        <T as RccPeripheral>::enable_and_reset();
-
-        T::Interrupt::unpend();
-        unsafe { T::Interrupt::enable() };
-
         let r = T::regs();
         let core_id = r.cid().read().0;
         trace!("Core id {:08x}", core_id);
@@ -1469,3 +1432,159 @@ fn calculate_trdt(speed: vals::Dspd, ahb_freq: Hertz) -> u8 {
 fn quirk_setup_late_cnak(r: crate::pac::otg::Otg) -> bool {
     r.cid().read().0 & 0xf000 == 0x1000
 }
+
+// Using Instance::ENDPOINT_COUNT requires feature(const_generic_expr) so just define maximum eps
+const MAX_EP_COUNT: usize = 9;
+
+pub(crate) mod sealed {
+    pub trait Instance {
+        const HIGH_SPEED: bool;
+        const FIFO_DEPTH_WORDS: u16;
+        const ENDPOINT_COUNT: usize;
+
+        fn regs() -> crate::pac::otg::Otg;
+        fn state() -> &'static super::State<{ super::MAX_EP_COUNT }>;
+    }
+}
+
+/// USB instance trait.
+pub trait Instance: sealed::Instance + RccPeripheral + 'static {
+    /// Interrupt for this USB instance.
+    type Interrupt: interrupt::typelevel::Interrupt;
+}
+
+// Internal PHY pins
+pin_trait!(DpPin, Instance);
+pin_trait!(DmPin, Instance);
+
+// External PHY pins
+pin_trait!(UlpiClkPin, Instance);
+pin_trait!(UlpiDirPin, Instance);
+pin_trait!(UlpiNxtPin, Instance);
+pin_trait!(UlpiStpPin, Instance);
+pin_trait!(UlpiD0Pin, Instance);
+pin_trait!(UlpiD1Pin, Instance);
+pin_trait!(UlpiD2Pin, Instance);
+pin_trait!(UlpiD3Pin, Instance);
+pin_trait!(UlpiD4Pin, Instance);
+pin_trait!(UlpiD5Pin, Instance);
+pin_trait!(UlpiD6Pin, Instance);
+pin_trait!(UlpiD7Pin, Instance);
+
+foreach_interrupt!(
+    (USB_OTG_FS, otg, $block:ident, GLOBAL, $irq:ident) => {
+        impl sealed::Instance for crate::peripherals::USB_OTG_FS {
+            const HIGH_SPEED: bool = false;
+
+            cfg_if::cfg_if! {
+                if #[cfg(stm32f1)] {
+                    const FIFO_DEPTH_WORDS: u16 = 128;
+                    const ENDPOINT_COUNT: usize = 8;
+                } else if #[cfg(any(
+                    stm32f2,
+                    stm32f401,
+                    stm32f405,
+                    stm32f407,
+                    stm32f411,
+                    stm32f415,
+                    stm32f417,
+                    stm32f427,
+                    stm32f429,
+                    stm32f437,
+                    stm32f439,
+                ))] {
+                    const FIFO_DEPTH_WORDS: u16 = 320;
+                    const ENDPOINT_COUNT: usize = 4;
+                } else if #[cfg(any(
+                    stm32f412,
+                    stm32f413,
+                    stm32f423,
+                    stm32f446,
+                    stm32f469,
+                    stm32f479,
+                    stm32f7,
+                    stm32l4,
+                    stm32u5,
+                ))] {
+                    const FIFO_DEPTH_WORDS: u16 = 320;
+                    const ENDPOINT_COUNT: usize = 6;
+                } else if #[cfg(stm32g0x1)] {
+                    const FIFO_DEPTH_WORDS: u16 = 512;
+                    const ENDPOINT_COUNT: usize = 8;
+                } else if #[cfg(stm32h7)] {
+                    const FIFO_DEPTH_WORDS: u16 = 1024;
+                    const ENDPOINT_COUNT: usize = 9;
+                } else if #[cfg(stm32u5)] {
+                    const FIFO_DEPTH_WORDS: u16 = 320;
+                    const ENDPOINT_COUNT: usize = 6;
+                } else {
+                    compile_error!("USB_OTG_FS peripheral is not supported by this chip.");
+                }
+            }
+
+            fn regs() -> crate::pac::otg::Otg {
+                crate::pac::USB_OTG_FS
+            }
+
+            fn state() -> &'static State<MAX_EP_COUNT> {
+                static STATE: State<MAX_EP_COUNT> = State::new();
+                &STATE
+            }
+        }
+
+        impl Instance for crate::peripherals::USB_OTG_FS {
+            type Interrupt = crate::interrupt::typelevel::$irq;
+        }
+    };
+
+    (USB_OTG_HS, otg, $block:ident, GLOBAL, $irq:ident) => {
+        impl sealed::Instance for crate::peripherals::USB_OTG_HS {
+            const HIGH_SPEED: bool = true;
+
+            cfg_if::cfg_if! {
+                if #[cfg(any(
+                    stm32f2,
+                    stm32f405,
+                    stm32f407,
+                    stm32f415,
+                    stm32f417,
+                    stm32f427,
+                    stm32f429,
+                    stm32f437,
+                    stm32f439,
+                ))] {
+                    const FIFO_DEPTH_WORDS: u16 = 1024;
+                    const ENDPOINT_COUNT: usize = 6;
+                } else if #[cfg(any(
+                    stm32f446,
+                    stm32f469,
+                    stm32f479,
+                    stm32f7,
+                    stm32h7,
+                ))] {
+                    const FIFO_DEPTH_WORDS: u16 = 1024;
+                    const ENDPOINT_COUNT: usize = 9;
+                } else if #[cfg(stm32u5)] {
+                    const FIFO_DEPTH_WORDS: u16 = 1024;
+                    const ENDPOINT_COUNT: usize = 9;
+                } else {
+                    compile_error!("USB_OTG_HS peripheral is not supported by this chip.");
+                }
+            }
+
+            fn regs() -> crate::pac::otg::Otg {
+                // OTG HS registers are a superset of FS registers
+                unsafe { crate::pac::otg::Otg::from_ptr(crate::pac::USB_OTG_HS.as_ptr()) }
+            }
+
+            fn state() -> &'static State<MAX_EP_COUNT> {
+                static STATE: State<MAX_EP_COUNT> = State::new();
+                &STATE
+            }
+        }
+
+        impl Instance for crate::peripherals::USB_OTG_HS {
+            type Interrupt = crate::interrupt::typelevel::$irq;
+        }
+    };
+);
diff --git a/embassy-stm32/src/usb/usb.rs b/embassy-stm32/src/usb/usb.rs
index be321a19b..1fb2c9ebb 100644
--- a/embassy-stm32/src/usb/usb.rs
+++ b/embassy-stm32/src/usb/usb.rs
@@ -12,8 +12,6 @@ use embassy_usb_driver::{
     Direction, EndpointAddress, EndpointAllocError, EndpointError, EndpointInfo, EndpointType, Event, Unsupported,
 };
 
-use super::{DmPin, DpPin, Instance};
-use crate::interrupt::typelevel::Interrupt;
 use crate::pac::usb::regs;
 use crate::pac::usb::vals::{EpType, Stat};
 use crate::pac::USBRAM;
@@ -259,18 +257,10 @@ impl<'d, T: Instance> Driver<'d, T> {
         dm: impl Peripheral<P = impl DmPin<T>> + 'd,
     ) -> Self {
         into_ref!(dp, dm);
-        T::Interrupt::unpend();
-        unsafe { T::Interrupt::enable() };
 
-        let regs = T::regs();
-
-        #[cfg(any(stm32l4, stm32l5, stm32wb))]
-        crate::pac::PWR.cr2().modify(|w| w.set_usv(true));
+        super::common_init::<T>();
 
-        #[cfg(pwr_h5)]
-        crate::pac::PWR.usbscr().modify(|w| w.set_usb33sv(true));
-
-        <T as RccPeripheral>::enable_and_reset();
+        let regs = T::regs();
 
         regs.cntr().write(|w| {
             w.set_pdwn(false);
@@ -1057,3 +1047,33 @@ impl<'d, T: Instance> driver::ControlPipe for ControlPipe<'d, T> {
         });
     }
 }
+
+pub(crate) mod sealed {
+    pub trait Instance {
+        fn regs() -> crate::pac::usb::Usb;
+    }
+}
+
+/// USB instance trait.
+pub trait Instance: sealed::Instance + RccPeripheral + 'static {
+    /// Interrupt for this USB instance.
+    type Interrupt: interrupt::typelevel::Interrupt;
+}
+
+// Internal PHY pins
+pin_trait!(DpPin, Instance);
+pin_trait!(DmPin, Instance);
+
+foreach_interrupt!(
+    ($inst:ident, usb, $block:ident, LP, $irq:ident) => {
+        impl sealed::Instance for crate::peripherals::$inst {
+            fn regs() -> crate::pac::usb::Usb {
+                crate::pac::$inst
+            }
+        }
+
+        impl Instance for crate::peripherals::$inst {
+            type Interrupt = crate::interrupt::typelevel::$irq;
+        }
+    };
+);
diff --git a/embassy-stm32/src/usb_otg/mod.rs b/embassy-stm32/src/usb_otg/mod.rs
deleted file mode 100644
index 0649e684b..000000000
--- a/embassy-stm32/src/usb_otg/mod.rs
+++ /dev/null
@@ -1,163 +0,0 @@
-//! USB On The Go (OTG)
-
-use crate::rcc::RccPeripheral;
-use crate::{interrupt, peripherals};
-
-mod usb;
-pub use usb::*;
-
-// Using Instance::ENDPOINT_COUNT requires feature(const_generic_expr) so just define maximum eps
-const MAX_EP_COUNT: usize = 9;
-
-pub(crate) mod sealed {
-    pub trait Instance {
-        const HIGH_SPEED: bool;
-        const FIFO_DEPTH_WORDS: u16;
-        const ENDPOINT_COUNT: usize;
-
-        fn regs() -> crate::pac::otg::Otg;
-        fn state() -> &'static super::State<{ super::MAX_EP_COUNT }>;
-    }
-}
-
-/// USB OTG instance.
-pub trait Instance: sealed::Instance + RccPeripheral {
-    /// Interrupt for this USB OTG instance.
-    type Interrupt: interrupt::typelevel::Interrupt;
-}
-
-// Internal PHY pins
-pin_trait!(DpPin, Instance);
-pin_trait!(DmPin, Instance);
-
-// External PHY pins
-pin_trait!(UlpiClkPin, Instance);
-pin_trait!(UlpiDirPin, Instance);
-pin_trait!(UlpiNxtPin, Instance);
-pin_trait!(UlpiStpPin, Instance);
-pin_trait!(UlpiD0Pin, Instance);
-pin_trait!(UlpiD1Pin, Instance);
-pin_trait!(UlpiD2Pin, Instance);
-pin_trait!(UlpiD3Pin, Instance);
-pin_trait!(UlpiD4Pin, Instance);
-pin_trait!(UlpiD5Pin, Instance);
-pin_trait!(UlpiD6Pin, Instance);
-pin_trait!(UlpiD7Pin, Instance);
-
-foreach_interrupt!(
-    (USB_OTG_FS, otg, $block:ident, GLOBAL, $irq:ident) => {
-        impl sealed::Instance for peripherals::USB_OTG_FS {
-            const HIGH_SPEED: bool = false;
-
-            cfg_if::cfg_if! {
-                if #[cfg(stm32f1)] {
-                    const FIFO_DEPTH_WORDS: u16 = 128;
-                    const ENDPOINT_COUNT: usize = 8;
-                } else if #[cfg(any(
-                    stm32f2,
-                    stm32f401,
-                    stm32f405,
-                    stm32f407,
-                    stm32f411,
-                    stm32f415,
-                    stm32f417,
-                    stm32f427,
-                    stm32f429,
-                    stm32f437,
-                    stm32f439,
-                ))] {
-                    const FIFO_DEPTH_WORDS: u16 = 320;
-                    const ENDPOINT_COUNT: usize = 4;
-                } else if #[cfg(any(
-                    stm32f412,
-                    stm32f413,
-                    stm32f423,
-                    stm32f446,
-                    stm32f469,
-                    stm32f479,
-                    stm32f7,
-                    stm32l4,
-                    stm32u5,
-                ))] {
-                    const FIFO_DEPTH_WORDS: u16 = 320;
-                    const ENDPOINT_COUNT: usize = 6;
-                } else if #[cfg(stm32g0x1)] {
-                    const FIFO_DEPTH_WORDS: u16 = 512;
-                    const ENDPOINT_COUNT: usize = 8;
-                } else if #[cfg(stm32h7)] {
-                    const FIFO_DEPTH_WORDS: u16 = 1024;
-                    const ENDPOINT_COUNT: usize = 9;
-                } else if #[cfg(stm32u5)] {
-                    const FIFO_DEPTH_WORDS: u16 = 320;
-                    const ENDPOINT_COUNT: usize = 6;
-                } else {
-                    compile_error!("USB_OTG_FS peripheral is not supported by this chip.");
-                }
-            }
-
-            fn regs() -> crate::pac::otg::Otg {
-                crate::pac::USB_OTG_FS
-            }
-
-                        fn state() -> &'static State<MAX_EP_COUNT> {
-                static STATE: State<MAX_EP_COUNT> = State::new();
-                &STATE
-            }
-        }
-
-        impl Instance for peripherals::USB_OTG_FS {
-            type Interrupt = crate::interrupt::typelevel::$irq;
-        }
-    };
-
-    (USB_OTG_HS, otg, $block:ident, GLOBAL, $irq:ident) => {
-        impl sealed::Instance for peripherals::USB_OTG_HS {
-            const HIGH_SPEED: bool = true;
-
-            cfg_if::cfg_if! {
-                if #[cfg(any(
-                    stm32f2,
-                    stm32f405,
-                    stm32f407,
-                    stm32f415,
-                    stm32f417,
-                    stm32f427,
-                    stm32f429,
-                    stm32f437,
-                    stm32f439,
-                ))] {
-                    const FIFO_DEPTH_WORDS: u16 = 1024;
-                    const ENDPOINT_COUNT: usize = 6;
-                } else if #[cfg(any(
-                    stm32f446,
-                    stm32f469,
-                    stm32f479,
-                    stm32f7,
-                    stm32h7,
-                ))] {
-                    const FIFO_DEPTH_WORDS: u16 = 1024;
-                    const ENDPOINT_COUNT: usize = 9;
-                } else if #[cfg(stm32u5)] {
-                    const FIFO_DEPTH_WORDS: u16 = 1024;
-                    const ENDPOINT_COUNT: usize = 9;
-                } else {
-                    compile_error!("USB_OTG_HS peripheral is not supported by this chip.");
-                }
-            }
-
-            fn regs() -> crate::pac::otg::Otg {
-                // OTG HS registers are a superset of FS registers
-                unsafe { crate::pac::otg::Otg::from_ptr(crate::pac::USB_OTG_HS.as_ptr()) }
-            }
-
-                        fn state() -> &'static State<MAX_EP_COUNT> {
-                static STATE: State<MAX_EP_COUNT> = State::new();
-                &STATE
-            }
-        }
-
-        impl Instance for peripherals::USB_OTG_HS {
-            type Interrupt = crate::interrupt::typelevel::$irq;
-        }
-    };
-);