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authorLambert Sartory <[email protected]>2025-12-11 00:04:37 +0100
committerLambert Sartory <[email protected]>2025-12-11 00:26:58 +0100
commit86271ea39e841bfa7f8d74defc4aaa07a680be13 (patch)
tree790b369664eda029a39dff0330356ca8cc309a22 /embassy-stm32/src
parent80a8859b2f4ad215ac04e4c55649f6f47191b035 (diff)
Enable STM32N6 DMA and I2C clock sources
Diffstat (limited to 'embassy-stm32/src')
-rw-r--r--embassy-stm32/src/dma/gpdma/mod.rs1
-rw-r--r--embassy-stm32/src/dma/mod.rs4
-rw-r--r--embassy-stm32/src/rcc/n6.rs20
3 files changed, 20 insertions, 5 deletions
diff --git a/embassy-stm32/src/dma/gpdma/mod.rs b/embassy-stm32/src/dma/gpdma/mod.rs
index 51c107cb4..afb18ec1a 100644
--- a/embassy-stm32/src/dma/gpdma/mod.rs
+++ b/embassy-stm32/src/dma/gpdma/mod.rs
@@ -137,7 +137,6 @@ pub(crate) unsafe fn init(cs: critical_section::CriticalSection, irq_priority: c
137 137
138impl AnyChannel { 138impl AnyChannel {
139 /// Safety: Must be called with a matching set of parameters for a valid dma channel 139 /// Safety: Must be called with a matching set of parameters for a valid dma channel
140 #[cfg(not(stm32n6))]
141 pub(crate) unsafe fn on_irq(&self) { 140 pub(crate) unsafe fn on_irq(&self) {
142 let info = self.info(); 141 let info = self.info();
143 #[cfg(feature = "_dual-core")] 142 #[cfg(feature = "_dual-core")]
diff --git a/embassy-stm32/src/dma/mod.rs b/embassy-stm32/src/dma/mod.rs
index 90feab167..05d9c2e51 100644
--- a/embassy-stm32/src/dma/mod.rs
+++ b/embassy-stm32/src/dma/mod.rs
@@ -48,11 +48,9 @@ pub type Request = u8;
48pub type Request = (); 48pub type Request = ();
49 49
50pub(crate) trait SealedChannel: StoppablePeripheral { 50pub(crate) trait SealedChannel: StoppablePeripheral {
51 #[cfg(not(stm32n6))]
52 fn id(&self) -> u8; 51 fn id(&self) -> u8;
53} 52}
54 53
55#[cfg(not(stm32n6))]
56pub(crate) trait ChannelInterrupt { 54pub(crate) trait ChannelInterrupt {
57 #[cfg_attr(not(feature = "rt"), allow(unused))] 55 #[cfg_attr(not(feature = "rt"), allow(unused))]
58 unsafe fn on_irq(); 56 unsafe fn on_irq();
@@ -62,7 +60,6 @@ pub(crate) trait ChannelInterrupt {
62#[allow(private_bounds)] 60#[allow(private_bounds)]
63pub trait Channel: SealedChannel + PeripheralType + Into<AnyChannel> + 'static {} 61pub trait Channel: SealedChannel + PeripheralType + Into<AnyChannel> + 'static {}
64 62
65#[cfg(not(stm32n6))]
66macro_rules! dma_channel_impl { 63macro_rules! dma_channel_impl {
67 ($channel_peri:ident, $index:expr, $stop_mode:ident) => { 64 ($channel_peri:ident, $index:expr, $stop_mode:ident) => {
68 impl crate::rcc::StoppablePeripheral for crate::peripherals::$channel_peri { 65 impl crate::rcc::StoppablePeripheral for crate::peripherals::$channel_peri {
@@ -125,7 +122,6 @@ impl StoppablePeripheral for AnyChannel {
125} 122}
126 123
127impl SealedChannel for AnyChannel { 124impl SealedChannel for AnyChannel {
128 #[cfg(not(stm32n6))]
129 fn id(&self) -> u8 { 125 fn id(&self) -> u8 {
130 self.id 126 self.id
131 } 127 }
diff --git a/embassy-stm32/src/rcc/n6.rs b/embassy-stm32/src/rcc/n6.rs
index 866851bbd..178ec57d4 100644
--- a/embassy-stm32/src/rcc/n6.rs
+++ b/embassy-stm32/src/rcc/n6.rs
@@ -1003,6 +1003,24 @@ pub(crate) unsafe fn init(config: Config) {
1003 p.SCB.cpacr.modify(|w| w | (3 << 20) | (3 << 22)); 1003 p.SCB.cpacr.modify(|w| w | (3 << 20) | (3 << 22));
1004 } 1004 }
1005 1005
1006 // TODO: ugly workaround for DMA accesses until RIF is properly implemented
1007 debug!("deactivating RIF");
1008 const RISAF3_BASE_NS: *mut u32 = stm32_metapac::RNG.wrapping_byte_offset(0x8000) as _; // AHB3PERIPH_BASE_NS + 0x8000UL
1009 const RISAF3_REG0_CFGR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x40);
1010 const RISAF3_REG0_ENDR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x48);
1011 const RISAF3_REG0_CIDCFGR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x4C);
1012 const RISAF3_REG1_CFGR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x80);
1013 const RISAF3_REG1_ENDR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x88);
1014 const RISAF3_REG1_CIDCFGR: *mut u32 = RISAF3_BASE_NS.wrapping_byte_offset(0x8C);
1015 unsafe {
1016 *RISAF3_REG0_CIDCFGR = 0x000F000F; /* RW for everyone */
1017 *RISAF3_REG0_ENDR = 0xFFFFFFFF; /* all-encompassing */
1018 *RISAF3_REG0_CFGR = 0x00000101; /* enabled, secure, unprivileged for everyone */
1019 *RISAF3_REG1_CIDCFGR = 0x00FF00FF; /* RW for everyone */
1020 *RISAF3_REG1_ENDR = 0xFFFFFFFF; /* all-encompassing */
1021 *RISAF3_REG1_CFGR = 0x00000001; /* enabled, non-secure, unprivileged*/
1022 }
1023
1006 debug!("setting power supply config"); 1024 debug!("setting power supply config");
1007 1025
1008 power_supply_config(config.supply_config); 1026 power_supply_config(config.supply_config);
@@ -1039,7 +1057,9 @@ pub(crate) unsafe fn init(config: Config) {
1039 i2s_ckin: None, 1057 i2s_ckin: None,
1040 ic8: None, 1058 ic8: None,
1041 ic9: None, 1059 ic9: None,
1060 ic10: None,
1042 ic14: None, 1061 ic14: None,
1062 ic15: None,
1043 ic17: None, 1063 ic17: None,
1044 ic20: None, 1064 ic20: None,
1045 ); 1065 );