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authorSteven Friedman <[email protected]>2025-04-08 09:36:35 -0400
committerSteven Friedman <[email protected]>2025-04-08 09:36:35 -0400
commitbbf2a641dd6760777d862d8de49217c632b30156 (patch)
tree252d333b74a824dd345373ae890ff236bf549b28 /embassy-stm32/src
parent3cb178e78e737fd83e78d04233e7e13f668f6c61 (diff)
remove Hz from log
Diffstat (limited to 'embassy-stm32/src')
-rw-r--r--embassy-stm32/src/adc/c0.rs2
-rw-r--r--embassy-stm32/src/adc/g4.rs2
-rw-r--r--embassy-stm32/src/adc/u5_adc4.rs2
-rw-r--r--embassy-stm32/src/adc/v4.rs2
-rw-r--r--embassy-stm32/src/rcc/h.rs4
-rw-r--r--embassy-stm32/src/rcc/u5.rs2
6 files changed, 7 insertions, 7 deletions
diff --git a/embassy-stm32/src/adc/c0.rs b/embassy-stm32/src/adc/c0.rs
index a9f0da07e..936ad7413 100644
--- a/embassy-stm32/src/adc/c0.rs
+++ b/embassy-stm32/src/adc/c0.rs
@@ -163,7 +163,7 @@ impl<'d, T: Instance> Adc<'d, T> {
163 T::common_regs().ccr().modify(|w| w.set_presc(prescaler.presc())); 163 T::common_regs().ccr().modify(|w| w.set_presc(prescaler.presc()));
164 164
165 let frequency = Hertz(T::frequency().0 / prescaler.divisor()); 165 let frequency = Hertz(T::frequency().0 / prescaler.divisor());
166 debug!("ADC frequency set to {} Hz", frequency); 166 debug!("ADC frequency set to {}", frequency);
167 167
168 if frequency > MAX_ADC_CLK_FREQ { 168 if frequency > MAX_ADC_CLK_FREQ {
169 panic!("Maximal allowed frequency for the ADC is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 ); 169 panic!("Maximal allowed frequency for the ADC is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 );
diff --git a/embassy-stm32/src/adc/g4.rs b/embassy-stm32/src/adc/g4.rs
index 8d13c85be..91be53607 100644
--- a/embassy-stm32/src/adc/g4.rs
+++ b/embassy-stm32/src/adc/g4.rs
@@ -143,7 +143,7 @@ impl<'d, T: Instance> Adc<'d, T> {
143 T::common_regs().ccr().modify(|w| w.set_presc(prescaler.presc())); 143 T::common_regs().ccr().modify(|w| w.set_presc(prescaler.presc()));
144 144
145 let frequency = Hertz(T::frequency().0 / prescaler.divisor()); 145 let frequency = Hertz(T::frequency().0 / prescaler.divisor());
146 info!("ADC frequency set to {} Hz", frequency); 146 info!("ADC frequency set to {}", frequency);
147 147
148 if frequency > MAX_ADC_CLK_FREQ { 148 if frequency > MAX_ADC_CLK_FREQ {
149 panic!("Maximal allowed frequency for the ADC is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 ); 149 panic!("Maximal allowed frequency for the ADC is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 );
diff --git a/embassy-stm32/src/adc/u5_adc4.rs b/embassy-stm32/src/adc/u5_adc4.rs
index eee500ef5..1dd664366 100644
--- a/embassy-stm32/src/adc/u5_adc4.rs
+++ b/embassy-stm32/src/adc/u5_adc4.rs
@@ -193,7 +193,7 @@ impl<'d, T: Instance> Adc4<'d, T> {
193 T::regs().ccr().modify(|w| w.set_presc(prescaler.presc())); 193 T::regs().ccr().modify(|w| w.set_presc(prescaler.presc()));
194 194
195 let frequency = Hertz(T::frequency().0 / prescaler.divisor()); 195 let frequency = Hertz(T::frequency().0 / prescaler.divisor());
196 info!("ADC4 frequency set to {} Hz", frequency); 196 info!("ADC4 frequency set to {}", frequency);
197 197
198 if frequency > MAX_ADC_CLK_FREQ { 198 if frequency > MAX_ADC_CLK_FREQ {
199 panic!("Maximal allowed frequency for ADC4 is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 ); 199 panic!("Maximal allowed frequency for ADC4 is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 );
diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs
index 9bc8c9712..4d2e0f0df 100644
--- a/embassy-stm32/src/adc/v4.rs
+++ b/embassy-stm32/src/adc/v4.rs
@@ -166,7 +166,7 @@ impl<'d, T: Instance> Adc<'d, T> {
166 T::common_regs().ccr().modify(|w| w.set_presc(prescaler.presc())); 166 T::common_regs().ccr().modify(|w| w.set_presc(prescaler.presc()));
167 167
168 let frequency = Hertz(T::frequency().0 / prescaler.divisor()); 168 let frequency = Hertz(T::frequency().0 / prescaler.divisor());
169 info!("ADC frequency set to {} Hz", frequency); 169 info!("ADC frequency set to {}", frequency);
170 170
171 if frequency > MAX_ADC_CLK_FREQ { 171 if frequency > MAX_ADC_CLK_FREQ {
172 panic!("Maximal allowed frequency for the ADC is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 ); 172 panic!("Maximal allowed frequency for the ADC is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 );
diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs
index 39af84ad3..33d698861 100644
--- a/embassy-stm32/src/rcc/h.rs
+++ b/embassy-stm32/src/rcc/h.rs
@@ -575,7 +575,7 @@ pub(crate) unsafe fn init(config: Config) {
575 Hertz(24_000_000) => Usbrefcksel::MHZ24, 575 Hertz(24_000_000) => Usbrefcksel::MHZ24,
576 Hertz(26_000_000) => Usbrefcksel::MHZ26, 576 Hertz(26_000_000) => Usbrefcksel::MHZ26,
577 Hertz(32_000_000) => Usbrefcksel::MHZ32, 577 Hertz(32_000_000) => Usbrefcksel::MHZ32,
578 _ => panic!("cannot select USBPHYC reference clock with source frequency of {} Hz, must be one of 16, 19.2, 20, 24, 26, 32 MHz", clk_val), 578 _ => panic!("cannot select USBPHYC reference clock with source frequency of {}, must be one of 16, 19.2, 20, 24, 26, 32 MHz", clk_val),
579 }, 579 },
580 None => Usbrefcksel::MHZ24, 580 None => Usbrefcksel::MHZ24,
581 }; 581 };
@@ -792,7 +792,7 @@ fn init_pll(num: usize, config: Option<Pll>, input: &PllInput) -> PllOutput {
792 } else if wide_allowed && VCO_WIDE_RANGE.contains(&vco_clk) { 792 } else if wide_allowed && VCO_WIDE_RANGE.contains(&vco_clk) {
793 Pllvcosel::WIDE_VCO 793 Pllvcosel::WIDE_VCO
794 } else { 794 } else {
795 panic!("pll vco_clk out of range: {} hz", vco_clk) 795 panic!("pll vco_clk out of range: {}", vco_clk)
796 }; 796 };
797 797
798 let p = config.divp.map(|div| { 798 let p = config.divp.map(|div| {
diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs
index dc77dc540..d15eb53f8 100644
--- a/embassy-stm32/src/rcc/u5.rs
+++ b/embassy-stm32/src/rcc/u5.rs
@@ -315,7 +315,7 @@ pub(crate) unsafe fn init(config: Config) {
315 Hertz(24_000_000) => Usbrefcksel::MHZ24, 315 Hertz(24_000_000) => Usbrefcksel::MHZ24,
316 Hertz(26_000_000) => Usbrefcksel::MHZ26, 316 Hertz(26_000_000) => Usbrefcksel::MHZ26,
317 Hertz(32_000_000) => Usbrefcksel::MHZ32, 317 Hertz(32_000_000) => Usbrefcksel::MHZ32,
318 _ => panic!("cannot select OTG_HS reference clock with source frequency of {} Hz, must be one of 16, 19.2, 20, 24, 26, 32 MHz", clk_val), 318 _ => panic!("cannot select OTG_HS reference clock with source frequency of {}, must be one of 16, 19.2, 20, 24, 26, 32 MHz", clk_val),
319 }, 319 },
320 None => Usbrefcksel::MHZ24, 320 None => Usbrefcksel::MHZ24,
321 }; 321 };