aboutsummaryrefslogtreecommitdiff
path: root/embassy-stm32/src
diff options
context:
space:
mode:
authorjrmoulton <[email protected]>2024-08-13 12:53:58 -0600
committerjrmoulton <[email protected]>2024-08-13 12:53:58 -0600
commitfc342915e6155dec7bafa3e135da7f37a9a07f5c (patch)
tree713574f6c7a43bfcdbf5d1ec8f7de36e6727acf9 /embassy-stm32/src
parentbfc162d43755f988c0b4963fc23386273ce02a35 (diff)
add stm32 i2c slave example
Diffstat (limited to 'embassy-stm32/src')
-rw-r--r--embassy-stm32/src/i2c/mod.rs10
-rw-r--r--embassy-stm32/src/i2c/v2.rs26
2 files changed, 18 insertions, 18 deletions
diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs
index 94507eb34..2ff21702b 100644
--- a/embassy-stm32/src/i2c/mod.rs
+++ b/embassy-stm32/src/i2c/mod.rs
@@ -70,19 +70,19 @@ pub mod mode {
70#[derive(Debug, Clone, PartialEq, Eq)] 70#[derive(Debug, Clone, PartialEq, Eq)]
71#[cfg_attr(feature = "defmt", derive(defmt::Format))] 71#[cfg_attr(feature = "defmt", derive(defmt::Format))]
72/// The command kind to the slave from the master 72/// The command kind to the slave from the master
73pub enum CommandKind { 73pub enum SlaveCommandKind {
74 /// Write to the slave 74 /// Write to the slave
75 SlaveReceive, 75 Write,
76 /// Read from the slave 76 /// Read from the slave
77 SlaveSend, 77 Read,
78} 78}
79 79
80#[derive(Debug, Clone, PartialEq, Eq)] 80#[derive(Debug, Clone, PartialEq, Eq)]
81#[cfg_attr(feature = "defmt", derive(defmt::Format))] 81#[cfg_attr(feature = "defmt", derive(defmt::Format))]
82/// The command kind to the slave from the master and the address that the slave matched 82/// The command kind to the slave from the master and the address that the slave matched
83pub struct Command { 83pub struct SlaveCommand {
84 /// The kind of command 84 /// The kind of command
85 pub kind: CommandKind, 85 pub kind: SlaveCommandKind,
86 /// The address that the slave matched 86 /// The address that the slave matched
87 pub address: Address, 87 pub address: Address,
88} 88}
diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
index 1cc41fb5f..64ccd24c7 100644
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@@ -887,7 +887,7 @@ impl<'d, M: Mode> I2c<'d, M, MultiMaster> {
887 /// Listen for incoming I2C messages. 887 /// Listen for incoming I2C messages.
888 /// 888 ///
889 /// The listen method is an asynchronous method but it does not require DMA to be asynchronous. 889 /// The listen method is an asynchronous method but it does not require DMA to be asynchronous.
890 pub async fn listen(&mut self) -> Result<Command, Error> { 890 pub async fn listen(&mut self) -> Result<SlaveCommand, Error> {
891 let state = self.state; 891 let state = self.state;
892 self.info.regs.cr1().modify(|reg| { 892 self.info.regs.cr1().modify(|reg| {
893 reg.set_addrie(true); 893 reg.set_addrie(true);
@@ -902,12 +902,12 @@ impl<'d, M: Mode> I2c<'d, M, MultiMaster> {
902 // we do not clear the address flag here as it will be cleared by the dma read/write 902 // we do not clear the address flag here as it will be cleared by the dma read/write
903 // if we clear it here the clock stretching will stop and the master will read in data before the slave is ready to send it 903 // if we clear it here the clock stretching will stop and the master will read in data before the slave is ready to send it
904 match isr.dir() { 904 match isr.dir() {
905 i2c::vals::Dir::WRITE => Poll::Ready(Ok(Command { 905 i2c::vals::Dir::WRITE => Poll::Ready(Ok(SlaveCommand {
906 kind: CommandKind::SlaveReceive, 906 kind: SlaveCommandKind::Write,
907 address: self.determine_matched_address()?, 907 address: self.determine_matched_address()?,
908 })), 908 })),
909 i2c::vals::Dir::READ => Poll::Ready(Ok(Command { 909 i2c::vals::Dir::READ => Poll::Ready(Ok(SlaveCommand {
910 kind: CommandKind::SlaveSend, 910 kind: SlaveCommandKind::Read,
911 address: self.determine_matched_address()?, 911 address: self.determine_matched_address()?,
912 })), 912 })),
913 } 913 }
@@ -916,30 +916,30 @@ impl<'d, M: Mode> I2c<'d, M, MultiMaster> {
916 .await 916 .await
917 } 917 }
918 918
919 /// Respond to a receive command. 919 /// Respond to a write command.
920 pub fn blocking_respond_to_receive(&self, read: &mut [u8]) -> Result<(), Error> { 920 pub fn blocking_respond_to_write(&self, read: &mut [u8]) -> Result<(), Error> {
921 let timeout = self.timeout(); 921 let timeout = self.timeout();
922 self.slave_read_internal(read, timeout) 922 self.slave_read_internal(read, timeout)
923 } 923 }
924 924
925 /// Respond to a send command. 925 /// Respond to a read command.
926 pub fn blocking_respond_to_send(&mut self, write: &[u8]) -> Result<(), Error> { 926 pub fn blocking_respond_to_read(&mut self, write: &[u8]) -> Result<(), Error> {
927 let timeout = self.timeout(); 927 let timeout = self.timeout();
928 self.slave_write_internal(write, timeout) 928 self.slave_write_internal(write, timeout)
929 } 929 }
930} 930}
931 931
932impl<'d> I2c<'d, Async, MultiMaster> { 932impl<'d> I2c<'d, Async, MultiMaster> {
933 /// Respond to a receive command. 933 /// Respond to a write command.
934 /// 934 ///
935 /// Returns the total number of bytes received. 935 /// Returns the total number of bytes received.
936 pub async fn respond_to_receive(&mut self, buffer: &mut [u8]) -> Result<usize, Error> { 936 pub async fn respond_to_write(&mut self, buffer: &mut [u8]) -> Result<usize, Error> {
937 let timeout = self.timeout(); 937 let timeout = self.timeout();
938 timeout.with(self.read_dma_internal_slave(buffer, timeout)).await 938 timeout.with(self.read_dma_internal_slave(buffer, timeout)).await
939 } 939 }
940 940
941 /// Respond to a send request from an I2C master. 941 /// Respond to a read request from an I2C master.
942 pub async fn respond_to_send(&mut self, write: &[u8]) -> Result<SendStatus, Error> { 942 pub async fn respond_to_read(&mut self, write: &[u8]) -> Result<SendStatus, Error> {
943 let timeout = self.timeout(); 943 let timeout = self.timeout();
944 timeout.with(self.write_dma_internal_slave(write, timeout)).await 944 timeout.with(self.write_dma_internal_slave(write, timeout)).await
945 } 945 }