diff options
| author | RobertTDowling <[email protected]> | 2023-11-15 17:11:16 -0800 |
|---|---|---|
| committer | RobertTDowling <[email protected]> | 2023-11-15 17:11:16 -0800 |
| commit | 4947b136156e923447456edd8a28fe391e158dcd (patch) | |
| tree | faed59a5ceb969fad6630af69ee16aca6fef2f74 /embassy-stm32 | |
| parent | 006260feddf4d362a99260a38d86dffddab39d2e (diff) | |
stm32h7 ADC: Fix stalled clock in default h7 config
Diffstat (limited to 'embassy-stm32')
| -rw-r--r-- | embassy-stm32/src/rcc/h.rs | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/embassy-stm32/src/rcc/h.rs b/embassy-stm32/src/rcc/h.rs index 4407d9e93..bdae850f7 100644 --- a/embassy-stm32/src/rcc/h.rs +++ b/embassy-stm32/src/rcc/h.rs | |||
| @@ -168,7 +168,12 @@ impl Default for Config { | |||
| 168 | apb4_pre: APBPrescaler::DIV1, | 168 | apb4_pre: APBPrescaler::DIV1, |
| 169 | 169 | ||
| 170 | per_clock_source: PerClockSource::HSI, | 170 | per_clock_source: PerClockSource::HSI, |
| 171 | adc_clock_source: AdcClockSource::from_bits(0), // PLL2_P on H7, HCLK on H5 | 171 | |
| 172 | #[cfg(stm32h5)] | ||
| 173 | adc_clock_source: AdcClockSource::from_bits(0), // HCLK on H5 | ||
| 174 | #[cfg(stm32h7)] | ||
| 175 | adc_clock_source: AdcClockSource::from_bits(2), // PCLK on H7 | ||
| 176 | |||
| 172 | timer_prescaler: TimerPrescaler::DefaultX2, | 177 | timer_prescaler: TimerPrescaler::DefaultX2, |
| 173 | voltage_scale: VoltageScale::Scale0, | 178 | voltage_scale: VoltageScale::Scale0, |
| 174 | ls: Default::default(), | 179 | ls: Default::default(), |