diff options
| author | xoviat <[email protected]> | 2023-07-30 14:02:41 -0500 |
|---|---|---|
| committer | xoviat <[email protected]> | 2023-07-30 14:02:41 -0500 |
| commit | 538cf2bc24c6c9b299b01a63f775fa37d66c635b (patch) | |
| tree | 85d25185c94ca88f0472ed59a86fab9fc0d8b4b0 /embassy-stm32 | |
| parent | 6f30e92c7aecc80d9fdf23e462a5128c07446f2f (diff) | |
stm32/dma: fix condition check
Diffstat (limited to 'embassy-stm32')
| -rw-r--r-- | embassy-stm32/src/dma/ringbuffer.rs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/embassy-stm32/src/dma/ringbuffer.rs b/embassy-stm32/src/dma/ringbuffer.rs index 800f19069..1235e5327 100644 --- a/embassy-stm32/src/dma/ringbuffer.rs +++ b/embassy-stm32/src/dma/ringbuffer.rs | |||
| @@ -236,7 +236,7 @@ impl<'a, W: Word> WritableDmaRingBuffer<'a, W> { | |||
| 236 | 236 | ||
| 237 | // Confirm that the DMA is not inside data we could have written | 237 | // Confirm that the DMA is not inside data we could have written |
| 238 | let pos = self.pos(dma.get_remaining_transfers()); | 238 | let pos = self.pos(dma.get_remaining_transfers()); |
| 239 | if (pos > self.end && pos <= start) || dma.get_complete_count() > 1 { | 239 | if (pos > self.end && pos <= start) || dma.get_complete_count() > 0 { |
| 240 | Err(OverrunError) | 240 | Err(OverrunError) |
| 241 | } else { | 241 | } else { |
| 242 | self.end = (self.end + len) % self.cap(); | 242 | self.end = (self.end + len) % self.cap(); |