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authornikvoid <[email protected]>2025-01-22 13:23:29 +0200
committernikvoid <[email protected]>2025-01-22 13:23:29 +0200
commit5885369f47d1260e58656bfc13bebba6339cf6cc (patch)
treeebd7f6869317de00e656bd7126ff5546fdecf0a9 /embassy-stm32
parent27fb1f4dd004bd32c718b932694cb498fe9bff91 (diff)
Option to detect Ethernet PHY address automatically
Diffstat (limited to 'embassy-stm32')
-rw-r--r--embassy-stm32/src/eth/generic_smi.rs22
1 files changed, 20 insertions, 2 deletions
diff --git a/embassy-stm32/src/eth/generic_smi.rs b/embassy-stm32/src/eth/generic_smi.rs
index 3b43051f4..06d01124f 100644
--- a/embassy-stm32/src/eth/generic_smi.rs
+++ b/embassy-stm32/src/eth/generic_smi.rs
@@ -51,6 +51,8 @@ pub struct GenericSMI {
51 51
52impl GenericSMI { 52impl GenericSMI {
53 /// Construct the PHY. It assumes the address `phy_addr` in the SMI communication 53 /// Construct the PHY. It assumes the address `phy_addr` in the SMI communication
54 ///
55 /// Set `phy_addr` to `0xFF` for automatic detection
54 pub fn new(phy_addr: u8) -> Self { 56 pub fn new(phy_addr: u8) -> Self {
55 Self { 57 Self {
56 phy_addr, 58 phy_addr,
@@ -62,8 +64,24 @@ impl GenericSMI {
62 64
63unsafe impl PHY for GenericSMI { 65unsafe impl PHY for GenericSMI {
64 fn phy_reset<S: StationManagement>(&mut self, sm: &mut S) { 66 fn phy_reset<S: StationManagement>(&mut self, sm: &mut S) {
65 sm.smi_write(self.phy_addr, PHY_REG_BCR, PHY_REG_BCR_RESET); 67 // Detect SMI address
66 while sm.smi_read(self.phy_addr, PHY_REG_BCR) & PHY_REG_BCR_RESET == PHY_REG_BCR_RESET {} 68 if self.phy_addr == 0xFF {
69 for addr in 0..32 {
70 sm.smi_write(addr, PHY_REG_BCR, PHY_REG_BCR_RESET);
71 for _ in 0..10 {
72 if sm.smi_read(addr, PHY_REG_BCR) & PHY_REG_BCR_RESET != PHY_REG_BCR_RESET {
73 trace!("Found ETH PHY on address {}", addr);
74 self.phy_addr = addr;
75 return;
76 }
77 cortex_m::asm::delay(1000);
78 }
79 }
80 panic!("PHY did not respond");
81 } else {
82 sm.smi_write(self.phy_addr, PHY_REG_BCR, PHY_REG_BCR_RESET);
83 while sm.smi_read(self.phy_addr, PHY_REG_BCR) & PHY_REG_BCR_RESET == PHY_REG_BCR_RESET {}
84 }
67 } 85 }
68 86
69 fn phy_init<S: StationManagement>(&mut self, sm: &mut S) { 87 fn phy_init<S: StationManagement>(&mut self, sm: &mut S) {