diff options
| author | xoviat <[email protected]> | 2023-05-27 15:05:07 -0500 |
|---|---|---|
| committer | xoviat <[email protected]> | 2023-05-27 15:05:07 -0500 |
| commit | 7e501855fc2ee98bef6be56244c4587610dbdc32 (patch) | |
| tree | 2a8467219c620f2f4e26e854e74b0c0308c81907 /embassy-stm32 | |
| parent | c19967dcf24d5223de5fd9b390371dc24aeccc1d (diff) | |
stm32/ipcc: move into tl_mbox
Diffstat (limited to 'embassy-stm32')
| -rw-r--r-- | embassy-stm32/src/lib.rs | 2 | ||||
| -rw-r--r-- | embassy-stm32/src/tl_mbox/ipcc.rs (renamed from embassy-stm32/src/ipcc.rs) | 40 |
2 files changed, 20 insertions, 22 deletions
diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index c9df5c1b2..b9d7a15c7 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs | |||
| @@ -41,8 +41,6 @@ pub mod crc; | |||
| 41 | pub mod flash; | 41 | pub mod flash; |
| 42 | #[cfg(all(spi_v1, rcc_f4))] | 42 | #[cfg(all(spi_v1, rcc_f4))] |
| 43 | pub mod i2s; | 43 | pub mod i2s; |
| 44 | #[cfg(stm32wb)] | ||
| 45 | pub mod ipcc; | ||
| 46 | pub mod pwm; | 44 | pub mod pwm; |
| 47 | #[cfg(quadspi)] | 45 | #[cfg(quadspi)] |
| 48 | pub mod qspi; | 46 | pub mod qspi; |
diff --git a/embassy-stm32/src/ipcc.rs b/embassy-stm32/src/tl_mbox/ipcc.rs index ea33b32c7..d1ac731ed 100644 --- a/embassy-stm32/src/ipcc.rs +++ b/embassy-stm32/src/tl_mbox/ipcc.rs | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | use crate::ipcc::sealed::Instance; | 1 | use self::sealed::Instance; |
| 2 | use crate::peripherals::IPCC; | 2 | use crate::peripherals::IPCC; |
| 3 | use crate::rcc::sealed::RccPeripheral; | 3 | use crate::rcc::sealed::RccPeripheral; |
| 4 | 4 | ||
| @@ -20,17 +20,17 @@ pub enum IpccChannel { | |||
| 20 | Channel6 = 5, | 20 | Channel6 = 5, |
| 21 | } | 21 | } |
| 22 | 22 | ||
| 23 | pub(crate) mod sealed { | 23 | pub mod sealed { |
| 24 | pub trait Instance: crate::rcc::RccPeripheral { | 24 | pub trait Instance: crate::rcc::RccPeripheral { |
| 25 | fn regs() -> crate::pac::ipcc::Ipcc; | 25 | fn regs() -> crate::pac::ipcc::Ipcc; |
| 26 | fn set_cpu2(enabled: bool); | 26 | fn set_cpu2(enabled: bool); |
| 27 | } | 27 | } |
| 28 | } | 28 | } |
| 29 | 29 | ||
| 30 | pub(crate) struct Ipcc; | 30 | pub struct Ipcc; |
| 31 | 31 | ||
| 32 | impl Ipcc { | 32 | impl Ipcc { |
| 33 | pub(crate) fn init(_config: Config) { | 33 | pub fn enable(_config: Config) { |
| 34 | IPCC::enable(); | 34 | IPCC::enable(); |
| 35 | IPCC::reset(); | 35 | IPCC::reset(); |
| 36 | IPCC::set_cpu2(true); | 36 | IPCC::set_cpu2(true); |
| @@ -47,14 +47,14 @@ impl Ipcc { | |||
| 47 | } | 47 | } |
| 48 | } | 48 | } |
| 49 | 49 | ||
| 50 | pub(crate) fn c1_set_rx_channel(channel: IpccChannel, enabled: bool) { | 50 | pub fn c1_set_rx_channel(channel: IpccChannel, enabled: bool) { |
| 51 | let regs = IPCC::regs(); | 51 | let regs = IPCC::regs(); |
| 52 | 52 | ||
| 53 | // If bit is set to 1 then interrupt is disabled | 53 | // If bit is set to 1 then interrupt is disabled |
| 54 | unsafe { regs.cpu(0).mr().modify(|w| w.set_chom(channel as usize, !enabled)) } | 54 | unsafe { regs.cpu(0).mr().modify(|w| w.set_chom(channel as usize, !enabled)) } |
| 55 | } | 55 | } |
| 56 | 56 | ||
| 57 | pub(crate) fn c1_get_rx_channel(channel: IpccChannel) -> bool { | 57 | pub fn c1_get_rx_channel(channel: IpccChannel) -> bool { |
| 58 | let regs = IPCC::regs(); | 58 | let regs = IPCC::regs(); |
| 59 | 59 | ||
| 60 | // If bit is set to 1 then interrupt is disabled | 60 | // If bit is set to 1 then interrupt is disabled |
| @@ -62,7 +62,7 @@ impl Ipcc { | |||
| 62 | } | 62 | } |
| 63 | 63 | ||
| 64 | #[allow(dead_code)] | 64 | #[allow(dead_code)] |
| 65 | pub(crate) fn c2_set_rx_channel(channel: IpccChannel, enabled: bool) { | 65 | pub fn c2_set_rx_channel(channel: IpccChannel, enabled: bool) { |
| 66 | let regs = IPCC::regs(); | 66 | let regs = IPCC::regs(); |
| 67 | 67 | ||
| 68 | // If bit is set to 1 then interrupt is disabled | 68 | // If bit is set to 1 then interrupt is disabled |
| @@ -70,21 +70,21 @@ impl Ipcc { | |||
| 70 | } | 70 | } |
| 71 | 71 | ||
| 72 | #[allow(dead_code)] | 72 | #[allow(dead_code)] |
| 73 | pub(crate) fn c2_get_rx_channel(channel: IpccChannel) -> bool { | 73 | pub fn c2_get_rx_channel(channel: IpccChannel) -> bool { |
| 74 | let regs = IPCC::regs(); | 74 | let regs = IPCC::regs(); |
| 75 | 75 | ||
| 76 | // If bit is set to 1 then interrupt is disabled | 76 | // If bit is set to 1 then interrupt is disabled |
| 77 | unsafe { !regs.cpu(1).mr().read().chom(channel as usize) } | 77 | unsafe { !regs.cpu(1).mr().read().chom(channel as usize) } |
| 78 | } | 78 | } |
| 79 | 79 | ||
| 80 | pub(crate) fn c1_set_tx_channel(channel: IpccChannel, enabled: bool) { | 80 | pub fn c1_set_tx_channel(channel: IpccChannel, enabled: bool) { |
| 81 | let regs = IPCC::regs(); | 81 | let regs = IPCC::regs(); |
| 82 | 82 | ||
| 83 | // If bit is set to 1 then interrupt is disabled | 83 | // If bit is set to 1 then interrupt is disabled |
| 84 | unsafe { regs.cpu(0).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) } | 84 | unsafe { regs.cpu(0).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) } |
| 85 | } | 85 | } |
| 86 | 86 | ||
| 87 | pub(crate) fn c1_get_tx_channel(channel: IpccChannel) -> bool { | 87 | pub fn c1_get_tx_channel(channel: IpccChannel) -> bool { |
| 88 | let regs = IPCC::regs(); | 88 | let regs = IPCC::regs(); |
| 89 | 89 | ||
| 90 | // If bit is set to 1 then interrupt is disabled | 90 | // If bit is set to 1 then interrupt is disabled |
| @@ -92,7 +92,7 @@ impl Ipcc { | |||
| 92 | } | 92 | } |
| 93 | 93 | ||
| 94 | #[allow(dead_code)] | 94 | #[allow(dead_code)] |
| 95 | pub(crate) fn c2_set_tx_channel(channel: IpccChannel, enabled: bool) { | 95 | pub fn c2_set_tx_channel(channel: IpccChannel, enabled: bool) { |
| 96 | let regs = IPCC::regs(); | 96 | let regs = IPCC::regs(); |
| 97 | 97 | ||
| 98 | // If bit is set to 1 then interrupt is disabled | 98 | // If bit is set to 1 then interrupt is disabled |
| @@ -100,7 +100,7 @@ impl Ipcc { | |||
| 100 | } | 100 | } |
| 101 | 101 | ||
| 102 | #[allow(dead_code)] | 102 | #[allow(dead_code)] |
| 103 | pub(crate) fn c2_get_tx_channel(channel: IpccChannel) -> bool { | 103 | pub fn c2_get_tx_channel(channel: IpccChannel) -> bool { |
| 104 | let regs = IPCC::regs(); | 104 | let regs = IPCC::regs(); |
| 105 | 105 | ||
| 106 | // If bit is set to 1 then interrupt is disabled | 106 | // If bit is set to 1 then interrupt is disabled |
| @@ -108,7 +108,7 @@ impl Ipcc { | |||
| 108 | } | 108 | } |
| 109 | 109 | ||
| 110 | /// clears IPCC receive channel status for CPU1 | 110 | /// clears IPCC receive channel status for CPU1 |
| 111 | pub(crate) fn c1_clear_flag_channel(channel: IpccChannel) { | 111 | pub fn c1_clear_flag_channel(channel: IpccChannel) { |
| 112 | let regs = IPCC::regs(); | 112 | let regs = IPCC::regs(); |
| 113 | 113 | ||
| 114 | unsafe { regs.cpu(0).scr().write(|w| w.set_chc(channel as usize, true)) } | 114 | unsafe { regs.cpu(0).scr().write(|w| w.set_chc(channel as usize, true)) } |
| @@ -116,42 +116,42 @@ impl Ipcc { | |||
| 116 | 116 | ||
| 117 | #[allow(dead_code)] | 117 | #[allow(dead_code)] |
| 118 | /// clears IPCC receive channel status for CPU2 | 118 | /// clears IPCC receive channel status for CPU2 |
| 119 | pub(crate) fn c2_clear_flag_channel(channel: IpccChannel) { | 119 | pub fn c2_clear_flag_channel(channel: IpccChannel) { |
| 120 | let regs = IPCC::regs(); | 120 | let regs = IPCC::regs(); |
| 121 | 121 | ||
| 122 | unsafe { regs.cpu(1).scr().write(|w| w.set_chc(channel as usize, true)) } | 122 | unsafe { regs.cpu(1).scr().write(|w| w.set_chc(channel as usize, true)) } |
| 123 | } | 123 | } |
| 124 | 124 | ||
| 125 | pub(crate) fn c1_set_flag_channel(channel: IpccChannel) { | 125 | pub fn c1_set_flag_channel(channel: IpccChannel) { |
| 126 | let regs = IPCC::regs(); | 126 | let regs = IPCC::regs(); |
| 127 | 127 | ||
| 128 | unsafe { regs.cpu(0).scr().write(|w| w.set_chs(channel as usize, true)) } | 128 | unsafe { regs.cpu(0).scr().write(|w| w.set_chs(channel as usize, true)) } |
| 129 | } | 129 | } |
| 130 | 130 | ||
| 131 | #[allow(dead_code)] | 131 | #[allow(dead_code)] |
| 132 | pub(crate) fn c2_set_flag_channel(channel: IpccChannel) { | 132 | pub fn c2_set_flag_channel(channel: IpccChannel) { |
| 133 | let regs = IPCC::regs(); | 133 | let regs = IPCC::regs(); |
| 134 | 134 | ||
| 135 | unsafe { regs.cpu(1).scr().write(|w| w.set_chs(channel as usize, true)) } | 135 | unsafe { regs.cpu(1).scr().write(|w| w.set_chs(channel as usize, true)) } |
| 136 | } | 136 | } |
| 137 | 137 | ||
| 138 | pub(crate) fn c1_is_active_flag(channel: IpccChannel) -> bool { | 138 | pub fn c1_is_active_flag(channel: IpccChannel) -> bool { |
| 139 | let regs = IPCC::regs(); | 139 | let regs = IPCC::regs(); |
| 140 | 140 | ||
| 141 | unsafe { regs.cpu(0).sr().read().chf(channel as usize) } | 141 | unsafe { regs.cpu(0).sr().read().chf(channel as usize) } |
| 142 | } | 142 | } |
| 143 | 143 | ||
| 144 | pub(crate) fn c2_is_active_flag(channel: IpccChannel) -> bool { | 144 | pub fn c2_is_active_flag(channel: IpccChannel) -> bool { |
| 145 | let regs = IPCC::regs(); | 145 | let regs = IPCC::regs(); |
| 146 | 146 | ||
| 147 | unsafe { regs.cpu(1).sr().read().chf(channel as usize) } | 147 | unsafe { regs.cpu(1).sr().read().chf(channel as usize) } |
| 148 | } | 148 | } |
| 149 | 149 | ||
| 150 | pub(crate) fn is_tx_pending(channel: IpccChannel) -> bool { | 150 | pub fn is_tx_pending(channel: IpccChannel) -> bool { |
| 151 | !Self::c1_is_active_flag(channel) && Self::c1_get_tx_channel(channel) | 151 | !Self::c1_is_active_flag(channel) && Self::c1_get_tx_channel(channel) |
| 152 | } | 152 | } |
| 153 | 153 | ||
| 154 | pub(crate) fn is_rx_pending(channel: IpccChannel) -> bool { | 154 | pub fn is_rx_pending(channel: IpccChannel) -> bool { |
| 155 | Self::c2_is_active_flag(channel) && Self::c1_get_rx_channel(channel) | 155 | Self::c2_is_active_flag(channel) && Self::c1_get_rx_channel(channel) |
| 156 | } | 156 | } |
| 157 | } | 157 | } |
