diff options
| author | eZio Pan <[email protected]> | 2023-12-30 12:01:08 +0800 |
|---|---|---|
| committer | eZio Pan <[email protected]> | 2023-12-30 12:01:08 +0800 |
| commit | 873ee0615147b4a4e0aacd069ce8ac8df611bbbf (patch) | |
| tree | 237c48b8a9cc17e2ae8570b08a2dc11ec6d1f567 /embassy-stm32 | |
| parent | 24f569821c7812714070a1ea3692b87100fc53e1 (diff) | |
some trivial fix
use less #[cfg] macro; reuse same variable
Diffstat (limited to 'embassy-stm32')
| -rw-r--r-- | embassy-stm32/src/timer/simple_pwm.rs | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/embassy-stm32/src/timer/simple_pwm.rs b/embassy-stm32/src/timer/simple_pwm.rs index acf0d12f9..7a5475c31 100644 --- a/embassy-stm32/src/timer/simple_pwm.rs +++ b/embassy-stm32/src/timer/simple_pwm.rs | |||
| @@ -177,15 +177,14 @@ where | |||
| 177 | let req = self.dma.request(); | 177 | let req = self.dma.request(); |
| 178 | 178 | ||
| 179 | #[cfg(not(any(bdma, gpdma)))] | 179 | #[cfg(not(any(bdma, gpdma)))] |
| 180 | let dma_regs = self.dma.regs(); | 180 | let (isr_bit, isr_reg, ifcr_reg) = { |
| 181 | #[cfg(not(any(bdma, gpdma)))] | 181 | let dma_regs = self.dma.regs(); |
| 182 | let isr_num = self.dma.num() / 4; | 182 | let isr_num = self.dma.num() / 4; |
| 183 | #[cfg(not(any(bdma, gpdma)))] | 183 | let isr_bit = self.dma.num() % 4; |
| 184 | let isr_bit = self.dma.num() % 4; | 184 | let isr_reg = dma_regs.isr(isr_num); |
| 185 | #[cfg(not(any(bdma, gpdma)))] | 185 | let ifcr_reg = dma_regs.ifcr(isr_num); |
| 186 | let isr_reg = dma_regs.isr(isr_num); | 186 | (isr_bit, isr_reg, ifcr_reg) |
| 187 | #[cfg(not(any(bdma, gpdma)))] | 187 | }; |
| 188 | let ifcr_reg = dma_regs.ifcr(isr_num); | ||
| 189 | 188 | ||
| 190 | #[cfg(not(any(bdma, gpdma)))] | 189 | #[cfg(not(any(bdma, gpdma)))] |
| 191 | // clean DMA FIFO error before a transfer | 190 | // clean DMA FIFO error before a transfer |