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authorAdam Greig <[email protected]>2023-11-19 04:26:36 +0000
committerDario Nieuwenhuis <[email protected]>2023-11-25 00:29:45 +0100
commit897663e023fa0e7fc84b6023a4f190af28b57295 (patch)
tree4e14f76a6660da8fc3cb3d3d2e47ba7a4b1e1439 /embassy-stm32
parent2218d30c8039b994ead02acc26130d25599d78ac (diff)
STM32: Add cfg to differentiate L4 and L4+ families
Diffstat (limited to 'embassy-stm32')
-rw-r--r--embassy-stm32/build.rs9
1 files changed, 9 insertions, 0 deletions
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs
index d92d92174..2011fd17d 100644
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@@ -1376,6 +1376,15 @@ fn main() {
1376 println!("cargo:rustc-cfg=flashsize_{}", &chip_name[10..11]); 1376 println!("cargo:rustc-cfg=flashsize_{}", &chip_name[10..11]);
1377 } 1377 }
1378 1378
1379 // Mark the L4+ chips as they have many differences to regular L4.
1380 if &chip_name[..7] == "stm32l4" {
1381 if "pqrs".contains(&chip_name[7..8]) {
1382 println!("cargo:rustc-cfg=stm32l4_plus");
1383 } else {
1384 println!("cargo:rustc-cfg=stm32l4_nonplus");
1385 }
1386 }
1387
1379 println!("cargo:rerun-if-changed=build.rs"); 1388 println!("cargo:rerun-if-changed=build.rs");
1380} 1389}
1381 1390