diff options
| author | xoviat <[email protected]> | 2025-12-13 07:56:20 -0600 |
|---|---|---|
| committer | xoviat <[email protected]> | 2025-12-13 07:56:20 -0600 |
| commit | c4c63394110d455428b9da4361acc581dfec90a2 (patch) | |
| tree | d02f85313fefe179dd5749f2c69756fbc5689ac3 /embassy-stm32 | |
| parent | 74f5ec6efdd62969c6edad706ab3313f4d535a6a (diff) | |
wpan: allow setting Rfwkpsel
Diffstat (limited to 'embassy-stm32')
| -rw-r--r-- | embassy-stm32/src/ipcc.rs | 8 | ||||
| -rw-r--r-- | embassy-stm32/src/rcc/l.rs | 9 |
2 files changed, 11 insertions, 6 deletions
diff --git a/embassy-stm32/src/ipcc.rs b/embassy-stm32/src/ipcc.rs index 183986fdc..fc0f3491e 100644 --- a/embassy-stm32/src/ipcc.rs +++ b/embassy-stm32/src/ipcc.rs | |||
| @@ -10,6 +10,7 @@ use embassy_sync::waitqueue::AtomicWaker; | |||
| 10 | 10 | ||
| 11 | use crate::interrupt::typelevel::Interrupt; | 11 | use crate::interrupt::typelevel::Interrupt; |
| 12 | use crate::peripherals::IPCC; | 12 | use crate::peripherals::IPCC; |
| 13 | use crate::rcc::SealedRccPeripheral; | ||
| 13 | use crate::{interrupt, rcc}; | 14 | use crate::{interrupt, rcc}; |
| 14 | 15 | ||
| 15 | /// Interrupt handler. | 16 | /// Interrupt handler. |
| @@ -223,11 +224,8 @@ impl Ipcc { | |||
| 223 | rcc::enable_and_reset::<IPCC>(); | 224 | rcc::enable_and_reset::<IPCC>(); |
| 224 | IPCC::set_cpu2(true); | 225 | IPCC::set_cpu2(true); |
| 225 | 226 | ||
| 226 | #[cfg(stm32wb)] | 227 | // Verify rfwkpsel is set |
| 227 | // DO NOT REMOVE THIS UNLESS YOU FIX THE EXAMPLES AND TEST FIRST | 228 | let _ = IPCC::frequency(); |
| 228 | crate::pac::RCC | ||
| 229 | .csr() | ||
| 230 | .modify(|w| w.set_rfwkpsel(stm32_metapac::rcc::vals::Rfwkpsel::LSE)); | ||
| 231 | 229 | ||
| 232 | let regs = IPCC::regs(); | 230 | let regs = IPCC::regs(); |
| 233 | 231 | ||
diff --git a/embassy-stm32/src/rcc/l.rs b/embassy-stm32/src/rcc/l.rs index 2e1cbd702..0d668103c 100644 --- a/embassy-stm32/src/rcc/l.rs +++ b/embassy-stm32/src/rcc/l.rs | |||
| @@ -135,7 +135,14 @@ pub const WPAN_DEFAULT: Config = Config { | |||
| 135 | apb1_pre: APBPrescaler::DIV1, | 135 | apb1_pre: APBPrescaler::DIV1, |
| 136 | apb2_pre: APBPrescaler::DIV1, | 136 | apb2_pre: APBPrescaler::DIV1, |
| 137 | 137 | ||
| 138 | mux: super::mux::ClockMux::default(), | 138 | mux: { |
| 139 | use crate::pac::rcc::vals::Rfwkpsel; | ||
| 140 | |||
| 141 | let mut mux = super::mux::ClockMux::default(); | ||
| 142 | |||
| 143 | mux.rfwkpsel = Rfwkpsel::LSE; | ||
| 144 | mux | ||
| 145 | }, | ||
| 139 | }; | 146 | }; |
| 140 | 147 | ||
| 141 | fn msi_enable(range: MSIRange) { | 148 | fn msi_enable(range: MSIRange) { |
