aboutsummaryrefslogtreecommitdiff
path: root/embassy-stm32
diff options
context:
space:
mode:
authorxoviat <[email protected]>2023-08-04 17:15:56 -0500
committerxoviat <[email protected]>2023-08-04 17:15:56 -0500
commite80db420610cc1bf2619bb64688f87712c1eee1c (patch)
treefe0105f518350c2b13ab5754fbc981174c5e66ce /embassy-stm32
parent7e269f6f1721ef5ca07c6e7354f2dd8b164644b7 (diff)
stm32/dma: minor cleanup, optmization
Diffstat (limited to 'embassy-stm32')
-rw-r--r--embassy-stm32/src/dma/bdma.rs4
-rw-r--r--embassy-stm32/src/dma/dma.rs8
2 files changed, 6 insertions, 6 deletions
diff --git a/embassy-stm32/src/dma/bdma.rs b/embassy-stm32/src/dma/bdma.rs
index e79a159ef..20ff29bef 100644
--- a/embassy-stm32/src/dma/bdma.rs
+++ b/embassy-stm32/src/dma/bdma.rs
@@ -497,7 +497,7 @@ impl<'a, C: Channel, W: Word> ReadableRingBuffer<'a, C, W> {
497 } 497 }
498 498
499 /// The capacity of the ringbuffer. 499 /// The capacity of the ringbuffer.
500 pub fn cap(&self) -> usize { 500 pub const fn cap(&self) -> usize {
501 self.ringbuf.cap() 501 self.ringbuf.cap()
502 } 502 }
503 503
@@ -628,7 +628,7 @@ impl<'a, C: Channel, W: Word> WritableRingBuffer<'a, C, W> {
628 } 628 }
629 629
630 /// The capacity of the ringbuffer. 630 /// The capacity of the ringbuffer.
631 pub fn cap(&self) -> usize { 631 pub const fn cap(&self) -> usize {
632 self.ringbuf.cap() 632 self.ringbuf.cap()
633 } 633 }
634 634
diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs
index 91d8b63b0..5033ae477 100644
--- a/embassy-stm32/src/dma/dma.rs
+++ b/embassy-stm32/src/dma/dma.rs
@@ -742,12 +742,12 @@ impl<'a, C: Channel, W: Word> ReadableRingBuffer<'a, C, W> {
742 } 742 }
743 743
744 // The capacity of the ringbuffer 744 // The capacity of the ringbuffer
745 pub fn cap(&self) -> usize { 745 pub const fn cap(&self) -> usize {
746 self.ringbuf.cap() 746 self.ringbuf.cap()
747 } 747 }
748 748
749 pub fn set_waker(&mut self, waker: &Waker) { 749 pub fn set_waker(&mut self, waker: &Waker) {
750 STATE.ch_wakers[self.channel.index()].register(waker); 750 DmaCtrlImpl(self.channel.reborrow()).set_waker(waker);
751 } 751 }
752 752
753 fn clear_irqs(&mut self) { 753 fn clear_irqs(&mut self) {
@@ -890,12 +890,12 @@ impl<'a, C: Channel, W: Word> WritableRingBuffer<'a, C, W> {
890 } 890 }
891 891
892 // The capacity of the ringbuffer 892 // The capacity of the ringbuffer
893 pub fn cap(&self) -> usize { 893 pub const fn cap(&self) -> usize {
894 self.ringbuf.cap() 894 self.ringbuf.cap()
895 } 895 }
896 896
897 pub fn set_waker(&mut self, waker: &Waker) { 897 pub fn set_waker(&mut self, waker: &Waker) {
898 STATE.ch_wakers[self.channel.index()].register(waker); 898 DmaCtrlImpl(self.channel.reborrow()).set_waker(waker);
899 } 899 }
900 900
901 fn clear_irqs(&mut self) { 901 fn clear_irqs(&mut self) {