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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2022-06-22 23:33:29 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2022-06-22 23:33:29 +0000 |
| commit | cf69f78162cb60e436789c446209fb6e51c77b48 (patch) | |
| tree | dbc332ca590262e20ac1bb4ef034584542e39b27 /examples/boot/application | |
| parent | 4a6f69e2d9e1c18ff5999a6aa049c280a6b8dcc4 (diff) | |
| parent | 88c37377228f824a09a22b2f49900dd0ec8b72bb (diff) | |
Merge #827
827: Fix PWM for advanced timers r=Dirbaio a=chemicstry
Advanced timers have additional BDTR register, which has a global output enable bit and it is disabled by default.
Also added an example for F4, but it will only work once https://github.com/embassy-rs/stm32-data/pull/149 is merged. We can also move it to some other chip, but I don't have anything else to test on atm.
Co-authored-by: chemicstry <[email protected]>
Diffstat (limited to 'examples/boot/application')
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