Merge branch 'main' into main

1 files changed, 4 insertions, 4 deletions

diff --git a/examples/boot/bootloader/stm32/src/main.rs b/examples/boot/bootloader/stm32/src/main.rs
index 99a7a6a6b..383ad912d 100644
--- a/examples/boot/bootloader/stm32/src/main.rs
+++ b/examples/boot/bootloader/stm32/src/main.rs
@@ -7,7 +7,7 @@ use cortex_m_rt::{entry, exception};
 #[cfg(feature = "defmt")]
 use defmt_rtt as _;
 use embassy_boot_stm32::*;
-use embassy_stm32::flash::{Flash, BANK1_REGION};
+use embassy_stm32::flash::{BANK1_REGION, Flash};
 use embassy_sync::blocking_mutex::Mutex;
 
 #[entry]
@@ -32,8 +32,8 @@ fn main() -> ! {
     unsafe { bl.load(BANK1_REGION.base + active_offset) }
 }
 
-#[no_mangle]
-#[cfg_attr(target_os = "none", link_section = ".HardFault.user")]
+#[unsafe(no_mangle)]
+#[cfg_attr(target_os = "none", unsafe(link_section = ".HardFault.user"))]
 unsafe extern "C" fn HardFault() {
     cortex_m::peripheral::SCB::sys_reset();
 }
@@ -41,7 +41,7 @@ unsafe extern "C" fn HardFault() {
 #[exception]
 unsafe fn DefaultHandler(_: i16) -> ! {
     const SCB_ICSR: *const u32 = 0xE000_ED04 as *const u32;
-    let irqn = core::ptr::read_volatile(SCB_ICSR) as u8 as i16 - 16;
+    let irqn = unsafe { core::ptr::read_volatile(SCB_ICSR) } as u8 as i16 - 16;
 
     panic!("DefaultHandler #{:?}", irqn);
 }