diff options
| author | James Munns <[email protected]> | 2025-12-18 18:57:38 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2025-12-18 18:57:38 +0000 |
| commit | b6a7d0610105e8f1e23fd1b3b0c1afd4efac4fe4 (patch) | |
| tree | edba11744846565385a438debf8be11ada5b416b /examples/mcxa/src/bin/clkout.rs | |
| parent | 65a6ce4c8bd1993e8cd05ce1d6fb3b378e35407a (diff) | |
| parent | 25f1963690a52a04ea0bc23e397b4fe6f585777a (diff) | |
Merge pull request #5107 from jamesmunns/james/spll
[MCXA]: Add SPLL/PLL1 support
Diffstat (limited to 'examples/mcxa/src/bin/clkout.rs')
| -rw-r--r-- | examples/mcxa/src/bin/clkout.rs | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/examples/mcxa/src/bin/clkout.rs b/examples/mcxa/src/bin/clkout.rs index e6e6a2d3d..c0e8c330d 100644 --- a/examples/mcxa/src/bin/clkout.rs +++ b/examples/mcxa/src/bin/clkout.rs | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | use embassy_executor::Spawner; | 4 | use embassy_executor::Spawner; |
| 5 | use embassy_mcxa::clkout::{ClockOut, ClockOutSel, Config, Div4}; | 5 | use embassy_mcxa::clkout::{ClockOut, ClockOutSel, Config, Div4}; |
| 6 | use embassy_mcxa::clocks::PoweredClock; | 6 | use embassy_mcxa::clocks::PoweredClock; |
| 7 | use embassy_mcxa::clocks::config::{SoscConfig, SoscMode}; | 7 | use embassy_mcxa::clocks::config::{SoscConfig, SoscMode, SpllConfig, SpllMode, SpllSource}; |
| 8 | use embassy_mcxa::gpio::{DriveStrength, Level, Output, SlewRate}; | 8 | use embassy_mcxa::gpio::{DriveStrength, Level, Output, SlewRate}; |
| 9 | use embassy_time::Timer; | 9 | use embassy_time::Timer; |
| 10 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; | 10 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; |
| @@ -18,6 +18,19 @@ async fn main(_spawner: Spawner) { | |||
| 18 | frequency: 8_000_000, | 18 | frequency: 8_000_000, |
| 19 | power: PoweredClock::NormalEnabledDeepSleepDisabled, | 19 | power: PoweredClock::NormalEnabledDeepSleepDisabled, |
| 20 | }); | 20 | }); |
| 21 | cfg.clock_cfg.spll = Some(SpllConfig { | ||
| 22 | source: SpllSource::Sirc, | ||
| 23 | // 12MHz | ||
| 24 | // 12 x 32 => 384MHz | ||
| 25 | // 384 / (16 x 2) => 12.0MHz | ||
| 26 | mode: SpllMode::Mode1b { | ||
| 27 | m_mult: 32, | ||
| 28 | p_div: 16, | ||
| 29 | bypass_p2_div: false, | ||
| 30 | }, | ||
| 31 | power: PoweredClock::NormalEnabledDeepSleepDisabled, | ||
| 32 | pll1_clk_div: None, | ||
| 33 | }); | ||
| 21 | 34 | ||
| 22 | let p = hal::init(cfg); | 35 | let p = hal::init(cfg); |
| 23 | 36 | ||
| @@ -39,11 +52,18 @@ async fn main(_spawner: Spawner) { | |||
| 39 | div: const { Div4::from_divisor(16).unwrap() }, | 52 | div: const { Div4::from_divisor(16).unwrap() }, |
| 40 | level: PoweredClock::NormalEnabledDeepSleepDisabled, | 53 | level: PoweredClock::NormalEnabledDeepSleepDisabled, |
| 41 | }; | 54 | }; |
| 55 | const M1_CONFIG: Config = Config { | ||
| 56 | sel: ClockOutSel::Pll1Clk, | ||
| 57 | div: const { Div4::from_divisor(12).unwrap() }, | ||
| 58 | level: PoweredClock::NormalEnabledDeepSleepDisabled, | ||
| 59 | }; | ||
| 42 | 60 | ||
| 61 | #[rustfmt::skip] | ||
| 43 | let configs = [ | 62 | let configs = [ |
| 44 | ("16K -> /1 = 16K", K16_CONFIG), | 63 | ("16K -> /1 = 16K", K16_CONFIG), |
| 45 | ("12M -> /3 = 4M", M4_CONFIG), | 64 | ("12M -> /3 = 4M", M4_CONFIG), |
| 46 | ("8M -> /16 = 512K", K512_CONFIG), | 65 | ("8M -> /16 = 512K", K512_CONFIG), |
| 66 | ("12M-> /12 = 1M", M1_CONFIG), | ||
| 47 | ]; | 67 | ]; |
| 48 | 68 | ||
| 49 | loop { | 69 | loop { |
