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authorFelipe Balbi <[email protected]>2025-12-18 08:57:15 -0800
committerFelipe Balbi <[email protected]>2025-12-18 08:57:15 -0800
commit6c9345a022dfd4a4dac5005166789792dffbbbe7 (patch)
treee26c47effaef7041ac1595f24fb0554cf3edf934 /examples/mcxa/src/bin
parentc3b5b1243f9ac80c85dc2fd1f88788a60baafd2f (diff)
[MCXA] reset_reason: process multiple bits
After testing with the pending watchdog driver, I noticed that more than one bit got set (Warm and Wdog0), changing my original assumption of this register being one-hot. Update the `reset_reason()` function and example according to James Munns' MCXA DMA Error implementation.
Diffstat (limited to 'examples/mcxa/src/bin')
-rw-r--r--examples/mcxa/src/bin/reset-reason.rs4
1 files changed, 3 insertions, 1 deletions
diff --git a/examples/mcxa/src/bin/reset-reason.rs b/examples/mcxa/src/bin/reset-reason.rs
index c244fbe04..2d48a92b1 100644
--- a/examples/mcxa/src/bin/reset-reason.rs
+++ b/examples/mcxa/src/bin/reset-reason.rs
@@ -11,5 +11,7 @@ async fn main(_spawner: Spawner) {
11 let config = Config::default(); 11 let config = Config::default();
12 let _p = hal::init(config); 12 let _p = hal::init(config);
13 13
14 defmt::info!("Reset Reason: '{}'", reset_reason()); 14 for reason in reset_reason().into_iter() {
15 defmt::info!("Reset Reason: '{}'", reason);
16 }
15} 17}