diff options
| author | James Munns <[email protected]> | 2025-12-05 15:55:28 +0100 |
|---|---|---|
| committer | James Munns <[email protected]> | 2025-12-05 15:55:28 +0100 |
| commit | 787bf84963ecd32306b6b2993504b2196f71cf72 (patch) | |
| tree | 825ae77473bade90384967393c399fce2a0fd54b /examples/mcxa | |
| parent | fa54dd5849a083b286b2a3f1928428c8704d3d70 (diff) | |
use core::fmt::Write instead of home-rolled fmt
Diffstat (limited to 'examples/mcxa')
| -rw-r--r-- | examples/mcxa/src/bin/dma_channel_link.rs | 32 | ||||
| -rw-r--r-- | examples/mcxa/src/bin/dma_interleave_transfer.rs | 32 | ||||
| -rw-r--r-- | examples/mcxa/src/bin/dma_mem_to_mem.rs | 33 | ||||
| -rw-r--r-- | examples/mcxa/src/bin/dma_memset.rs | 32 | ||||
| -rw-r--r-- | examples/mcxa/src/bin/dma_ping_pong_transfer.rs | 32 | ||||
| -rw-r--r-- | examples/mcxa/src/bin/dma_scatter_gather.rs | 31 | ||||
| -rw-r--r-- | examples/mcxa/src/bin/dma_scatter_gather_builder.rs | 21 | ||||
| -rw-r--r-- | examples/mcxa/src/bin/dma_wrap_transfer.rs | 32 |
8 files changed, 16 insertions, 229 deletions
diff --git a/examples/mcxa/src/bin/dma_channel_link.rs b/examples/mcxa/src/bin/dma_channel_link.rs index 92c7a9681..f7ab5d8fd 100644 --- a/examples/mcxa/src/bin/dma_channel_link.rs +++ b/examples/mcxa/src/bin/dma_channel_link.rs | |||
| @@ -22,6 +22,7 @@ use embassy_mcxa::dma::{DmaCh0InterruptHandler, DmaCh1InterruptHandler, DmaCh2In | |||
| 22 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; | 22 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; |
| 23 | use embassy_mcxa::{bind_interrupts, pac}; | 23 | use embassy_mcxa::{bind_interrupts, pac}; |
| 24 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; | 24 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; |
| 25 | use core::fmt::Write as _; | ||
| 25 | 26 | ||
| 26 | // Buffers | 27 | // Buffers |
| 27 | static mut SRC_BUFFER: [u32; 4] = [1, 2, 3, 4]; | 28 | static mut SRC_BUFFER: [u32; 4] = [1, 2, 3, 4]; |
| @@ -37,38 +38,9 @@ bind_interrupts!(struct Irqs { | |||
| 37 | DMA_CH2 => DmaCh2InterruptHandler; | 38 | DMA_CH2 => DmaCh2InterruptHandler; |
| 38 | }); | 39 | }); |
| 39 | 40 | ||
| 40 | /// Helper to write a u32 as decimal ASCII to UART | ||
| 41 | fn write_u32(tx: &mut LpuartTx<'_, Blocking>, val: u32) { | ||
| 42 | let mut buf = [0u8; 10]; | ||
| 43 | let mut n = val; | ||
| 44 | let mut i = buf.len(); | ||
| 45 | |||
| 46 | if n == 0 { | ||
| 47 | tx.blocking_write(b"0").ok(); | ||
| 48 | return; | ||
| 49 | } | ||
| 50 | |||
| 51 | while n > 0 { | ||
| 52 | i -= 1; | ||
| 53 | buf[i] = b'0' + (n % 10) as u8; | ||
| 54 | n /= 10; | ||
| 55 | } | ||
| 56 | |||
| 57 | tx.blocking_write(&buf[i..]).ok(); | ||
| 58 | } | ||
| 59 | |||
| 60 | /// Helper to print a buffer to UART | 41 | /// Helper to print a buffer to UART |
| 61 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { | 42 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { |
| 62 | tx.blocking_write(b"[").ok(); | 43 | write!(tx, "{:?}", unsafe { core::slice::from_raw_parts(buf_ptr, len) }).ok(); |
| 63 | unsafe { | ||
| 64 | for i in 0..len { | ||
| 65 | write_u32(tx, *buf_ptr.add(i)); | ||
| 66 | if i < len - 1 { | ||
| 67 | tx.blocking_write(b", ").ok(); | ||
| 68 | } | ||
| 69 | } | ||
| 70 | } | ||
| 71 | tx.blocking_write(b"]").ok(); | ||
| 72 | } | 44 | } |
| 73 | 45 | ||
| 74 | #[embassy_executor::main] | 46 | #[embassy_executor::main] |
diff --git a/examples/mcxa/src/bin/dma_interleave_transfer.rs b/examples/mcxa/src/bin/dma_interleave_transfer.rs index 7876e8978..98e301a7c 100644 --- a/examples/mcxa/src/bin/dma_interleave_transfer.rs +++ b/examples/mcxa/src/bin/dma_interleave_transfer.rs | |||
| @@ -16,6 +16,7 @@ use embassy_mcxa::dma::{DmaCh0InterruptHandler, DmaChannel}; | |||
| 16 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; | 16 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; |
| 17 | use embassy_mcxa::{bind_interrupts, pac}; | 17 | use embassy_mcxa::{bind_interrupts, pac}; |
| 18 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; | 18 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; |
| 19 | use core::fmt::Write as _; | ||
| 19 | 20 | ||
| 20 | // Bind DMA channel 0 interrupt using Embassy-style macro | 21 | // Bind DMA channel 0 interrupt using Embassy-style macro |
| 21 | bind_interrupts!(struct Irqs { | 22 | bind_interrupts!(struct Irqs { |
| @@ -29,38 +30,9 @@ const HALF_BUFF_LENGTH: usize = BUFFER_LENGTH / 2; | |||
| 29 | static mut SRC_BUFFER: [u32; HALF_BUFF_LENGTH] = [0; HALF_BUFF_LENGTH]; | 30 | static mut SRC_BUFFER: [u32; HALF_BUFF_LENGTH] = [0; HALF_BUFF_LENGTH]; |
| 30 | static mut DEST_BUFFER: [u32; BUFFER_LENGTH] = [0; BUFFER_LENGTH]; | 31 | static mut DEST_BUFFER: [u32; BUFFER_LENGTH] = [0; BUFFER_LENGTH]; |
| 31 | 32 | ||
| 32 | /// Helper to write a u32 as decimal ASCII to UART | ||
| 33 | fn write_u32(tx: &mut LpuartTx<'_, Blocking>, val: u32) { | ||
| 34 | let mut buf = [0u8; 10]; | ||
| 35 | let mut n = val; | ||
| 36 | let mut i = buf.len(); | ||
| 37 | |||
| 38 | if n == 0 { | ||
| 39 | tx.blocking_write(b"0").ok(); | ||
| 40 | return; | ||
| 41 | } | ||
| 42 | |||
| 43 | while n > 0 { | ||
| 44 | i -= 1; | ||
| 45 | buf[i] = b'0' + (n % 10) as u8; | ||
| 46 | n /= 10; | ||
| 47 | } | ||
| 48 | |||
| 49 | tx.blocking_write(&buf[i..]).ok(); | ||
| 50 | } | ||
| 51 | |||
| 52 | /// Helper to print a buffer to UART | 33 | /// Helper to print a buffer to UART |
| 53 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { | 34 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { |
| 54 | tx.blocking_write(b"[").ok(); | 35 | write!(tx, "{:?}", unsafe { core::slice::from_raw_parts(buf_ptr, len) }).ok(); |
| 55 | unsafe { | ||
| 56 | for i in 0..len { | ||
| 57 | write_u32(tx, *buf_ptr.add(i)); | ||
| 58 | if i < len - 1 { | ||
| 59 | tx.blocking_write(b", ").ok(); | ||
| 60 | } | ||
| 61 | } | ||
| 62 | } | ||
| 63 | tx.blocking_write(b"]").ok(); | ||
| 64 | } | 36 | } |
| 65 | 37 | ||
| 66 | #[embassy_executor::main] | 38 | #[embassy_executor::main] |
diff --git a/examples/mcxa/src/bin/dma_mem_to_mem.rs b/examples/mcxa/src/bin/dma_mem_to_mem.rs index 68f70e742..149e37326 100644 --- a/examples/mcxa/src/bin/dma_mem_to_mem.rs +++ b/examples/mcxa/src/bin/dma_mem_to_mem.rs | |||
| @@ -19,6 +19,7 @@ use embassy_mcxa::dma::{DmaCh0InterruptHandler, DmaChannel, TransferOptions}; | |||
| 19 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; | 19 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; |
| 20 | use embassy_mcxa::{bind_interrupts, pac}; | 20 | use embassy_mcxa::{bind_interrupts, pac}; |
| 21 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; | 21 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; |
| 22 | use core::fmt::Write as _; | ||
| 22 | 23 | ||
| 23 | // Bind DMA channel 0 interrupt using Embassy-style macro | 24 | // Bind DMA channel 0 interrupt using Embassy-style macro |
| 24 | bind_interrupts!(struct Irqs { | 25 | bind_interrupts!(struct Irqs { |
| @@ -32,40 +33,10 @@ static mut SRC_BUFFER: [u32; BUFFER_LENGTH] = [0; BUFFER_LENGTH]; | |||
| 32 | static mut DEST_BUFFER: [u32; BUFFER_LENGTH] = [0; BUFFER_LENGTH]; | 33 | static mut DEST_BUFFER: [u32; BUFFER_LENGTH] = [0; BUFFER_LENGTH]; |
| 33 | static mut MEMSET_BUFFER: [u32; BUFFER_LENGTH] = [0; BUFFER_LENGTH]; | 34 | static mut MEMSET_BUFFER: [u32; BUFFER_LENGTH] = [0; BUFFER_LENGTH]; |
| 34 | 35 | ||
| 35 | /// Helper to write a u32 as decimal ASCII to UART | ||
| 36 | fn write_u32(tx: &mut LpuartTx<'_, Blocking>, val: u32) { | ||
| 37 | let mut buf = [0u8; 10]; // u32 max is 4294967295 (10 digits) | ||
| 38 | let mut n = val; | ||
| 39 | let mut i = buf.len(); | ||
| 40 | |||
| 41 | if n == 0 { | ||
| 42 | tx.blocking_write(b"0").ok(); | ||
| 43 | return; | ||
| 44 | } | ||
| 45 | |||
| 46 | while n > 0 { | ||
| 47 | i -= 1; | ||
| 48 | buf[i] = b'0' + (n % 10) as u8; | ||
| 49 | n /= 10; | ||
| 50 | } | ||
| 51 | |||
| 52 | tx.blocking_write(&buf[i..]).ok(); | ||
| 53 | } | ||
| 54 | |||
| 55 | /// Helper to print a buffer as [v1, v2, v3, v4] to UART | 36 | /// Helper to print a buffer as [v1, v2, v3, v4] to UART |
| 56 | /// Takes a raw pointer to avoid warnings about shared references to mutable statics | 37 | /// Takes a raw pointer to avoid warnings about shared references to mutable statics |
| 57 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const [u32; BUFFER_LENGTH]) { | 38 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const [u32; BUFFER_LENGTH]) { |
| 58 | tx.blocking_write(b"[").ok(); | 39 | write!(tx, "{:?}", unsafe { &*buf_ptr }).ok(); |
| 59 | unsafe { | ||
| 60 | let buf = &*buf_ptr; | ||
| 61 | for (i, val) in buf.iter().enumerate() { | ||
| 62 | write_u32(tx, *val); | ||
| 63 | if i < buf.len() - 1 { | ||
| 64 | tx.blocking_write(b", ").ok(); | ||
| 65 | } | ||
| 66 | } | ||
| 67 | } | ||
| 68 | tx.blocking_write(b"]").ok(); | ||
| 69 | } | 40 | } |
| 70 | 41 | ||
| 71 | #[embassy_executor::main] | 42 | #[embassy_executor::main] |
diff --git a/examples/mcxa/src/bin/dma_memset.rs b/examples/mcxa/src/bin/dma_memset.rs index 95e365e47..bc4e78701 100644 --- a/examples/mcxa/src/bin/dma_memset.rs +++ b/examples/mcxa/src/bin/dma_memset.rs | |||
| @@ -16,6 +16,7 @@ use embassy_mcxa::dma::{DmaCh0InterruptHandler, DmaChannel}; | |||
| 16 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; | 16 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; |
| 17 | use embassy_mcxa::{bind_interrupts, pac}; | 17 | use embassy_mcxa::{bind_interrupts, pac}; |
| 18 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; | 18 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; |
| 19 | use core::fmt::Write as _; | ||
| 19 | 20 | ||
| 20 | // Bind DMA channel 0 interrupt using Embassy-style macro | 21 | // Bind DMA channel 0 interrupt using Embassy-style macro |
| 21 | bind_interrupts!(struct Irqs { | 22 | bind_interrupts!(struct Irqs { |
| @@ -28,38 +29,9 @@ const BUFFER_LENGTH: usize = 4; | |||
| 28 | static mut PATTERN: u32 = 0; | 29 | static mut PATTERN: u32 = 0; |
| 29 | static mut DEST_BUFFER: [u32; BUFFER_LENGTH] = [0; BUFFER_LENGTH]; | 30 | static mut DEST_BUFFER: [u32; BUFFER_LENGTH] = [0; BUFFER_LENGTH]; |
| 30 | 31 | ||
| 31 | /// Helper to write a u32 as decimal ASCII to UART | ||
| 32 | fn write_u32(tx: &mut LpuartTx<'_, Blocking>, val: u32) { | ||
| 33 | let mut buf = [0u8; 10]; | ||
| 34 | let mut n = val; | ||
| 35 | let mut i = buf.len(); | ||
| 36 | |||
| 37 | if n == 0 { | ||
| 38 | tx.blocking_write(b"0").ok(); | ||
| 39 | return; | ||
| 40 | } | ||
| 41 | |||
| 42 | while n > 0 { | ||
| 43 | i -= 1; | ||
| 44 | buf[i] = b'0' + (n % 10) as u8; | ||
| 45 | n /= 10; | ||
| 46 | } | ||
| 47 | |||
| 48 | tx.blocking_write(&buf[i..]).ok(); | ||
| 49 | } | ||
| 50 | |||
| 51 | /// Helper to print a buffer to UART | 32 | /// Helper to print a buffer to UART |
| 52 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { | 33 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { |
| 53 | tx.blocking_write(b"[").ok(); | 34 | write!(tx, "{:?}", unsafe { core::slice::from_raw_parts(buf_ptr, len) }).ok(); |
| 54 | unsafe { | ||
| 55 | for i in 0..len { | ||
| 56 | write_u32(tx, *buf_ptr.add(i)); | ||
| 57 | if i < len - 1 { | ||
| 58 | tx.blocking_write(b", ").ok(); | ||
| 59 | } | ||
| 60 | } | ||
| 61 | } | ||
| 62 | tx.blocking_write(b"]").ok(); | ||
| 63 | } | 35 | } |
| 64 | 36 | ||
| 65 | #[embassy_executor::main] | 37 | #[embassy_executor::main] |
diff --git a/examples/mcxa/src/bin/dma_ping_pong_transfer.rs b/examples/mcxa/src/bin/dma_ping_pong_transfer.rs index f8f543382..728e4d408 100644 --- a/examples/mcxa/src/bin/dma_ping_pong_transfer.rs +++ b/examples/mcxa/src/bin/dma_ping_pong_transfer.rs | |||
| @@ -31,6 +31,7 @@ use embassy_mcxa::dma::{self, DmaCh1InterruptHandler, DmaChannel, Tcd, TransferO | |||
| 31 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; | 31 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; |
| 32 | use embassy_mcxa::{bind_interrupts, pac}; | 32 | use embassy_mcxa::{bind_interrupts, pac}; |
| 33 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; | 33 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; |
| 34 | use core::fmt::Write as _; | ||
| 34 | 35 | ||
| 35 | // Source and destination buffers for Approach 1 (scatter/gather) | 36 | // Source and destination buffers for Approach 1 (scatter/gather) |
| 36 | static mut SRC: [u32; 8] = [1, 2, 3, 4, 5, 6, 7, 8]; | 37 | static mut SRC: [u32; 8] = [1, 2, 3, 4, 5, 6, 7, 8]; |
| @@ -87,38 +88,9 @@ bind_interrupts!(struct Irqs { | |||
| 87 | DMA_CH1 => DmaCh1InterruptHandler; | 88 | DMA_CH1 => DmaCh1InterruptHandler; |
| 88 | }); | 89 | }); |
| 89 | 90 | ||
| 90 | /// Helper to write a u32 as decimal ASCII to UART | ||
| 91 | fn write_u32(tx: &mut LpuartTx<'_, Blocking>, val: u32) { | ||
| 92 | let mut buf = [0u8; 10]; | ||
| 93 | let mut n = val; | ||
| 94 | let mut i = buf.len(); | ||
| 95 | |||
| 96 | if n == 0 { | ||
| 97 | tx.blocking_write(b"0").ok(); | ||
| 98 | return; | ||
| 99 | } | ||
| 100 | |||
| 101 | while n > 0 { | ||
| 102 | i -= 1; | ||
| 103 | buf[i] = b'0' + (n % 10) as u8; | ||
| 104 | n /= 10; | ||
| 105 | } | ||
| 106 | |||
| 107 | tx.blocking_write(&buf[i..]).ok(); | ||
| 108 | } | ||
| 109 | |||
| 110 | /// Helper to print a buffer to UART | 91 | /// Helper to print a buffer to UART |
| 111 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { | 92 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { |
| 112 | tx.blocking_write(b"[").ok(); | 93 | write!(tx, "{:?}", unsafe { core::slice::from_raw_parts(buf_ptr, len) }).ok(); |
| 113 | unsafe { | ||
| 114 | for i in 0..len { | ||
| 115 | write_u32(tx, *buf_ptr.add(i)); | ||
| 116 | if i < len - 1 { | ||
| 117 | tx.blocking_write(b", ").ok(); | ||
| 118 | } | ||
| 119 | } | ||
| 120 | } | ||
| 121 | tx.blocking_write(b"]").ok(); | ||
| 122 | } | 94 | } |
| 123 | 95 | ||
| 124 | #[embassy_executor::main] | 96 | #[embassy_executor::main] |
diff --git a/examples/mcxa/src/bin/dma_scatter_gather.rs b/examples/mcxa/src/bin/dma_scatter_gather.rs index 4b26bc2ed..ea553b843 100644 --- a/examples/mcxa/src/bin/dma_scatter_gather.rs +++ b/examples/mcxa/src/bin/dma_scatter_gather.rs | |||
| @@ -20,6 +20,7 @@ use embassy_mcxa::dma::{self, DmaChannel, Tcd}; | |||
| 20 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; | 20 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; |
| 21 | use embassy_mcxa::{bind_interrupts, pac}; | 21 | use embassy_mcxa::{bind_interrupts, pac}; |
| 22 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; | 22 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; |
| 23 | use core::fmt::Write as _; | ||
| 23 | 24 | ||
| 24 | // Source and destination buffers | 25 | // Source and destination buffers |
| 25 | static mut SRC: [u32; 8] = [1, 2, 3, 4, 5, 6, 7, 8]; | 26 | static mut SRC: [u32; 8] = [1, 2, 3, 4, 5, 6, 7, 8]; |
| @@ -72,38 +73,10 @@ bind_interrupts!(struct Irqs { | |||
| 72 | DMA_CH0 => ScatterGatherDmaHandler; | 73 | DMA_CH0 => ScatterGatherDmaHandler; |
| 73 | }); | 74 | }); |
| 74 | 75 | ||
| 75 | /// Helper to write a u32 as decimal ASCII to UART | ||
| 76 | fn write_u32(tx: &mut LpuartTx<'_, Blocking>, val: u32) { | ||
| 77 | let mut buf = [0u8; 10]; | ||
| 78 | let mut n = val; | ||
| 79 | let mut i = buf.len(); | ||
| 80 | |||
| 81 | if n == 0 { | ||
| 82 | tx.blocking_write(b"0").ok(); | ||
| 83 | return; | ||
| 84 | } | ||
| 85 | |||
| 86 | while n > 0 { | ||
| 87 | i -= 1; | ||
| 88 | buf[i] = b'0' + (n % 10) as u8; | ||
| 89 | n /= 10; | ||
| 90 | } | ||
| 91 | |||
| 92 | tx.blocking_write(&buf[i..]).ok(); | ||
| 93 | } | ||
| 94 | 76 | ||
| 95 | /// Helper to print a buffer to UART | 77 | /// Helper to print a buffer to UART |
| 96 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { | 78 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { |
| 97 | tx.blocking_write(b"[").ok(); | 79 | write!(tx, "{:?}", unsafe { core::slice::from_raw_parts(buf_ptr, len) }).ok(); |
| 98 | unsafe { | ||
| 99 | for i in 0..len { | ||
| 100 | write_u32(tx, *buf_ptr.add(i)); | ||
| 101 | if i < len - 1 { | ||
| 102 | tx.blocking_write(b", ").ok(); | ||
| 103 | } | ||
| 104 | } | ||
| 105 | } | ||
| 106 | tx.blocking_write(b"]").ok(); | ||
| 107 | } | 80 | } |
| 108 | 81 | ||
| 109 | #[embassy_executor::main] | 82 | #[embassy_executor::main] |
diff --git a/examples/mcxa/src/bin/dma_scatter_gather_builder.rs b/examples/mcxa/src/bin/dma_scatter_gather_builder.rs index e483bb81f..29c54ca42 100644 --- a/examples/mcxa/src/bin/dma_scatter_gather_builder.rs +++ b/examples/mcxa/src/bin/dma_scatter_gather_builder.rs | |||
| @@ -26,6 +26,7 @@ use embassy_mcxa::dma::{DmaCh0InterruptHandler, DmaChannel, ScatterGatherBuilder | |||
| 26 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; | 26 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; |
| 27 | use embassy_mcxa::{bind_interrupts, pac}; | 27 | use embassy_mcxa::{bind_interrupts, pac}; |
| 28 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; | 28 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; |
| 29 | use core::fmt::Write as _; | ||
| 29 | 30 | ||
| 30 | // Bind DMA channel 0 interrupt | 31 | // Bind DMA channel 0 interrupt |
| 31 | bind_interrupts!(struct Irqs { | 32 | bind_interrupts!(struct Irqs { |
| @@ -42,27 +43,9 @@ static mut DST1: [u32; 4] = [0; 4]; | |||
| 42 | static mut DST2: [u32; 4] = [0; 4]; | 43 | static mut DST2: [u32; 4] = [0; 4]; |
| 43 | static mut DST3: [u32; 4] = [0; 4]; | 44 | static mut DST3: [u32; 4] = [0; 4]; |
| 44 | 45 | ||
| 45 | /// Helper to write a u32 as hex to UART | ||
| 46 | fn write_hex(tx: &mut LpuartTx<'_, Blocking>, val: u32) { | ||
| 47 | const HEX: &[u8; 16] = b"0123456789ABCDEF"; | ||
| 48 | for i in (0..8).rev() { | ||
| 49 | let nibble = ((val >> (i * 4)) & 0xF) as usize; | ||
| 50 | tx.blocking_write(&[HEX[nibble]]).ok(); | ||
| 51 | } | ||
| 52 | } | ||
| 53 | |||
| 54 | /// Helper to print a buffer to UART | 46 | /// Helper to print a buffer to UART |
| 55 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { | 47 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { |
| 56 | tx.blocking_write(b"[").ok(); | 48 | write!(tx, "{:08X?}", unsafe { core::slice::from_raw_parts(buf_ptr, len) }).ok(); |
| 57 | unsafe { | ||
| 58 | for i in 0..len { | ||
| 59 | write_hex(tx, *buf_ptr.add(i)); | ||
| 60 | if i < len - 1 { | ||
| 61 | tx.blocking_write(b", ").ok(); | ||
| 62 | } | ||
| 63 | } | ||
| 64 | } | ||
| 65 | tx.blocking_write(b"]").ok(); | ||
| 66 | } | 49 | } |
| 67 | 50 | ||
| 68 | #[embassy_executor::main] | 51 | #[embassy_executor::main] |
diff --git a/examples/mcxa/src/bin/dma_wrap_transfer.rs b/examples/mcxa/src/bin/dma_wrap_transfer.rs index 82936d9d0..7fea4bf76 100644 --- a/examples/mcxa/src/bin/dma_wrap_transfer.rs +++ b/examples/mcxa/src/bin/dma_wrap_transfer.rs | |||
| @@ -16,6 +16,7 @@ use embassy_mcxa::dma::{DmaCh0InterruptHandler, DmaChannel}; | |||
| 16 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; | 16 | use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx}; |
| 17 | use embassy_mcxa::{bind_interrupts, pac}; | 17 | use embassy_mcxa::{bind_interrupts, pac}; |
| 18 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; | 18 | use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _}; |
| 19 | use core::fmt::Write as _; | ||
| 19 | 20 | ||
| 20 | // Bind DMA channel 0 interrupt using Embassy-style macro | 21 | // Bind DMA channel 0 interrupt using Embassy-style macro |
| 21 | bind_interrupts!(struct Irqs { | 22 | bind_interrupts!(struct Irqs { |
| @@ -29,38 +30,9 @@ struct AlignedSrc([u32; 4]); | |||
| 29 | static mut SRC: AlignedSrc = AlignedSrc([0; 4]); | 30 | static mut SRC: AlignedSrc = AlignedSrc([0; 4]); |
| 30 | static mut DST: [u32; 8] = [0; 8]; | 31 | static mut DST: [u32; 8] = [0; 8]; |
| 31 | 32 | ||
| 32 | /// Helper to write a u32 as decimal ASCII to UART | ||
| 33 | fn write_u32(tx: &mut LpuartTx<'_, Blocking>, val: u32) { | ||
| 34 | let mut buf = [0u8; 10]; | ||
| 35 | let mut n = val; | ||
| 36 | let mut i = buf.len(); | ||
| 37 | |||
| 38 | if n == 0 { | ||
| 39 | tx.blocking_write(b"0").ok(); | ||
| 40 | return; | ||
| 41 | } | ||
| 42 | |||
| 43 | while n > 0 { | ||
| 44 | i -= 1; | ||
| 45 | buf[i] = b'0' + (n % 10) as u8; | ||
| 46 | n /= 10; | ||
| 47 | } | ||
| 48 | |||
| 49 | tx.blocking_write(&buf[i..]).ok(); | ||
| 50 | } | ||
| 51 | |||
| 52 | /// Helper to print a buffer to UART | 33 | /// Helper to print a buffer to UART |
| 53 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { | 34 | fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) { |
| 54 | tx.blocking_write(b"[").ok(); | 35 | write!(tx, "{:?}", unsafe { core::slice::from_raw_parts(buf_ptr, len) }).ok(); |
| 55 | unsafe { | ||
| 56 | for i in 0..len { | ||
| 57 | write_u32(tx, *buf_ptr.add(i)); | ||
| 58 | if i < len - 1 { | ||
| 59 | tx.blocking_write(b", ").ok(); | ||
| 60 | } | ||
| 61 | } | ||
| 62 | } | ||
| 63 | tx.blocking_write(b"]").ok(); | ||
| 64 | } | 36 | } |
| 65 | 37 | ||
| 66 | #[embassy_executor::main] | 38 | #[embassy_executor::main] |
