Clean up remaining examples, move some to "raw" examples

6 files changed, 127 insertions, 331 deletions

diff --git a/examples/mcxa/src/bin/dma_scatter_gather_builder.rs b/examples/mcxa/src/bin/dma_scatter_gather_builder.rs
index 1691129f6..30ce20c96 100644
--- a/examples/mcxa/src/bin/dma_scatter_gather_builder.rs
+++ b/examples/mcxa/src/bin/dma_scatter_gather_builder.rs
@@ -112,11 +112,7 @@ async fn main(_spawner: Spawner) {
     defmt::info!("  DST2: {=[?]}", dst2.as_slice());
     defmt::info!("  DST3: {=[?]}", dst3.as_slice());
 
-    let comps = [
-        (src1, dst1),
-        (src2, dst2),
-        (src3, dst3),
-    ];
+    let comps = [(src1, dst1), (src2, dst2), (src3, dst3)];
 
     // Verify all three segments
     let mut all_ok = true;
diff --git a/examples/mcxa/src/bin/dma_channel_link.rs b/examples/mcxa/src/bin/raw_dma_channel_link.rs
index 2d757a636..987f1ba43 100644
--- a/examples/mcxa/src/bin/dma_channel_link.rs
+++ b/examples/mcxa/src/bin/raw_dma_channel_link.rs
@@ -1,5 +1,9 @@
 //! DMA channel linking example for MCXA276.
 //!
+//! NOTE: this is a "raw dma" example! It exists as a proof of concept, as we don't have
+//! a high-level and safe API for. It should not be taken as typical, recommended, or
+//! stable usage!
+//!
 //! This example demonstrates DMA channel linking (minor and major loop linking):
 //! - Channel 0: Transfers SRC_BUFFER to DEST_BUFFER0, with:
 //!   - Minor Link to Channel 1 (triggers CH1 after each minor loop)
@@ -16,25 +20,18 @@
 #![no_std]
 #![no_main]
 
-use core::fmt::Write as _;
-
 use embassy_executor::Spawner;
 use embassy_mcxa::clocks::config::Div8;
 use embassy_mcxa::dma::DmaChannel;
-use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx};
 use embassy_mcxa::pac;
+use static_cell::ConstStaticCell;
 use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
 
 // Buffers
-static mut SRC_BUFFER: [u32; 4] = [1, 2, 3, 4];
-static mut DEST_BUFFER0: [u32; 4] = [0; 4];
-static mut DEST_BUFFER1: [u32; 4] = [0; 4];
-static mut DEST_BUFFER2: [u32; 4] = [0; 4];
-
-/// Helper to print a buffer to UART
-fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) {
-    write!(tx, "{:?}", unsafe { core::slice::from_raw_parts(buf_ptr, len) }).ok();
-}
+static SRC_BUFFER: ConstStaticCell<[u32; 4]> = ConstStaticCell::new([1, 2, 3, 4]);
+static DEST_BUFFER0: ConstStaticCell<[u32; 4]> = ConstStaticCell::new([0; 4]);
+static DEST_BUFFER1: ConstStaticCell<[u32; 4]> = ConstStaticCell::new([0; 4]);
+static DEST_BUFFER2: ConstStaticCell<[u32; 4]> = ConstStaticCell::new([0; 4]);
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -77,42 +74,20 @@ async fn main(_spawner: Spawner) {
             .normal_operation()
     });
 
-    let config = Config {
-        baudrate_bps: 115_200,
-        ..Default::default()
-    };
-
-    let lpuart = Lpuart::new_blocking(p.LPUART2, p.P2_2, p.P2_3, config).unwrap();
-    let (mut tx, _rx) = lpuart.split();
-
-    tx.blocking_write(b"EDMA channel link example begin.\r\n\r\n").unwrap();
+    defmt::info!("EDMA channel link example begin.");
 
     // Initialize buffers
-    unsafe {
-        SRC_BUFFER = [1, 2, 3, 4];
-        DEST_BUFFER0 = [0; 4];
-        DEST_BUFFER1 = [0; 4];
-        DEST_BUFFER2 = [0; 4];
-    }
+    let src = SRC_BUFFER.take();
+    let dst0 = DEST_BUFFER0.take();
+    let dst1 = DEST_BUFFER1.take();
+    let dst2 = DEST_BUFFER2.take();
 
-    tx.blocking_write(b"Source Buffer:   ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(SRC_BUFFER) as *const u32, 4);
-    tx.blocking_write(b"\r\n").unwrap();
+    defmt::info!("Source Buffer: {=[?]}", src.as_slice());
+    defmt::info!("DEST0 (before): {=[?]}", dst0.as_slice());
+    defmt::info!("DEST1 (before): {=[?]}", dst1.as_slice());
+    defmt::info!("DEST2 (before): {=[?]}", dst2.as_slice());
 
-    tx.blocking_write(b"DEST0 (before):  ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(DEST_BUFFER0) as *const u32, 4);
-    tx.blocking_write(b"\r\n").unwrap();
-
-    tx.blocking_write(b"DEST1 (before):  ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(DEST_BUFFER1) as *const u32, 4);
-    tx.blocking_write(b"\r\n").unwrap();
-
-    tx.blocking_write(b"DEST2 (before):  ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(DEST_BUFFER2) as *const u32, 4);
-    tx.blocking_write(b"\r\n\r\n").unwrap();
-
-    tx.blocking_write(b"Configuring DMA channels with Embassy-style API...\r\n")
-        .unwrap();
+    defmt::info!("Configuring DMA channels with Embassy-style API...");
 
     let ch0 = DmaChannel::new(p.DMA_CH0);
     let ch1 = DmaChannel::new(p.DMA_CH1);
@@ -200,8 +175,8 @@ async fn main(_spawner: Spawner) {
         configure_tcd(
             edma,
             0,
-            core::ptr::addr_of!(SRC_BUFFER) as u32,
-            core::ptr::addr_of_mut!(DEST_BUFFER0) as u32,
+            src.as_ptr() as u32,
+            dst0.as_mut_ptr() as u32,
             4,     // src width
             8,     // nbytes (minor loop = 2 words)
             2,     // count (major loop = 2 iterations)
@@ -214,8 +189,8 @@ async fn main(_spawner: Spawner) {
         configure_tcd(
             edma,
             1,
-            core::ptr::addr_of!(SRC_BUFFER) as u32,
-            core::ptr::addr_of_mut!(DEST_BUFFER1) as u32,
+            src.as_ptr() as u32,
+            dst1.as_mut_ptr() as u32,
             4,
             16, // full buffer in one minor loop
             1,  // 1 major iteration
@@ -226,8 +201,8 @@ async fn main(_spawner: Spawner) {
         configure_tcd(
             edma,
             2,
-            core::ptr::addr_of!(SRC_BUFFER) as u32,
-            core::ptr::addr_of_mut!(DEST_BUFFER2) as u32,
+            src.as_ptr() as u32,
+            dst2.as_mut_ptr() as u32,
             4,
             16,   // full buffer in one minor loop
             1,    // 1 major iteration
@@ -235,8 +210,7 @@ async fn main(_spawner: Spawner) {
         );
     }
 
-    tx.blocking_write(b"Triggering Channel 0 (1st minor loop)...\r\n")
-        .unwrap();
+    defmt::info!("Triggering Channel 0 (1st minor loop)...");
 
     // Trigger first minor loop of CH0
     unsafe {
@@ -251,9 +225,8 @@ async fn main(_spawner: Spawner) {
         ch1.clear_done();
     }
 
-    tx.blocking_write(b"CH1 done (via minor link).\r\n").unwrap();
-    tx.blocking_write(b"Triggering Channel 0 (2nd minor loop)...\r\n")
-        .unwrap();
+    defmt::info!("CH1 done (via minor link).");
+    defmt::info!("Triggering Channel 0 (2nd minor loop)...");
 
     // Trigger second minor loop of CH0
     unsafe {
@@ -268,7 +241,7 @@ async fn main(_spawner: Spawner) {
         ch0.clear_done();
     }
 
-    tx.blocking_write(b"CH0 major loop done.\r\n").unwrap();
+    defmt::info!("CH0 major loop done.");
 
     // Wait for CH2 to complete (triggered by CH0 major link)
     // Using is_done() instead of AtomicBool - the standard interrupt handler
@@ -280,48 +253,23 @@ async fn main(_spawner: Spawner) {
         ch2.clear_done();
     }
 
-    tx.blocking_write(b"CH2 done (via major link).\r\n\r\n").unwrap();
-
-    tx.blocking_write(b"EDMA channel link example finish.\r\n\r\n").unwrap();
+    defmt::info!("CH2 done (via major link).");
 
-    tx.blocking_write(b"DEST0 (after):   ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(DEST_BUFFER0) as *const u32, 4);
-    tx.blocking_write(b"\r\n").unwrap();
+    defmt::info!("EDMA channel link example finish.");
 
-    tx.blocking_write(b"DEST1 (after):   ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(DEST_BUFFER1) as *const u32, 4);
-    tx.blocking_write(b"\r\n").unwrap();
-
-    tx.blocking_write(b"DEST2 (after):   ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(DEST_BUFFER2) as *const u32, 4);
-    tx.blocking_write(b"\r\n\r\n").unwrap();
+    defmt::info!("DEST0 (after): {=[?]}", dst0.as_slice());
+    defmt::info!("DEST1 (after): {=[?]}", dst1.as_slice());
+    defmt::info!("DEST2 (after): {=[?]}", dst2.as_slice());
 
     // Verify all buffers match source
     let mut success = true;
-    unsafe {
-        let src_ptr = core::ptr::addr_of!(SRC_BUFFER) as *const u32;
-        let dst0_ptr = core::ptr::addr_of!(DEST_BUFFER0) as *const u32;
-        let dst1_ptr = core::ptr::addr_of!(DEST_BUFFER1) as *const u32;
-        let dst2_ptr = core::ptr::addr_of!(DEST_BUFFER2) as *const u32;
-
-        for i in 0..4 {
-            if *dst0_ptr.add(i) != *src_ptr.add(i) {
-                success = false;
-            }
-            if *dst1_ptr.add(i) != *src_ptr.add(i) {
-                success = false;
-            }
-            if *dst2_ptr.add(i) != *src_ptr.add(i) {
-                success = false;
-            }
-        }
+    for sli in [dst0, dst1, dst2] {
+        success &= sli == src;
     }
 
     if success {
-        tx.blocking_write(b"PASS: Data verified.\r\n").unwrap();
         defmt::info!("PASS: Data verified.");
     } else {
-        tx.blocking_write(b"FAIL: Mismatch detected!\r\n").unwrap();
         defmt::error!("FAIL: Mismatch detected!");
     }
 
diff --git a/examples/mcxa/src/bin/dma_interleave_transfer.rs b/examples/mcxa/src/bin/raw_dma_interleave_transfer.rs
index 03441fc32..a383b6cf4 100644
--- a/examples/mcxa/src/bin/dma_interleave_transfer.rs
+++ b/examples/mcxa/src/bin/raw_dma_interleave_transfer.rs
@@ -1,5 +1,9 @@
 //! DMA interleaved transfer example for MCXA276.
 //!
+//! NOTE: this is a "raw dma" example! It exists as a proof of concept, as we don't have
+//! a high-level and safe API for. It should not be taken as typical, recommended, or
+//! stable usage!
+//!
 //! This example demonstrates using DMA with custom source/destination offsets
 //! to interleave data during transfer.
 //!
@@ -10,12 +14,9 @@
 #![no_std]
 #![no_main]
 
-use core::fmt::Write as _;
-
 use embassy_executor::Spawner;
 use embassy_mcxa::clocks::config::Div8;
 use embassy_mcxa::dma::DmaChannel;
-use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx};
 use static_cell::ConstStaticCell;
 use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
 
@@ -26,11 +27,6 @@ const HALF_BUFF_LENGTH: usize = BUFFER_LENGTH / 2;
 static SRC_BUFFER: ConstStaticCell<[u32; HALF_BUFF_LENGTH]> = ConstStaticCell::new([0; HALF_BUFF_LENGTH]);
 static DEST_BUFFER: ConstStaticCell<[u32; BUFFER_LENGTH]> = ConstStaticCell::new([0; BUFFER_LENGTH]);
 
-/// Helper to print a buffer to UART
-fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf: &[u32]) {
-    write!(tx, "{:?}", buf).ok();
-}
-
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
     // Small delay to allow probe-rs to attach after reset
@@ -45,32 +41,17 @@ async fn main(_spawner: Spawner) {
 
     defmt::info!("DMA interleave transfer example starting...");
 
-    let config = Config {
-        baudrate_bps: 115_200,
-        ..Default::default()
-    };
-
-    let lpuart = Lpuart::new_blocking(p.LPUART2, p.P2_2, p.P2_3, config).unwrap();
-    let (mut tx, _rx) = lpuart.split();
-
-    tx.blocking_write(b"EDMA interleave transfer example begin.\r\n\r\n")
-        .unwrap();
+    defmt::info!("EDMA interleave transfer example begin.");
 
     // Initialize buffers
     let src = SRC_BUFFER.take();
     *src = [1, 2, 3, 4, 5, 6, 7, 8];
     let dst = DEST_BUFFER.take();
 
-    tx.blocking_write(b"Source Buffer:              ").unwrap();
-    print_buffer(&mut tx, src);
-    tx.blocking_write(b"\r\n").unwrap();
-
-    tx.blocking_write(b"Destination Buffer (before): ").unwrap();
-    print_buffer(&mut tx, dst);
-    tx.blocking_write(b"\r\n").unwrap();
+    defmt::info!("Source Buffer: {=[?]}", src.as_slice());
+    defmt::info!("Destination Buffer (before): {=[?]}", dst.as_slice());
 
-    tx.blocking_write(b"Configuring DMA with Embassy-style API...\r\n")
-        .unwrap();
+    defmt::info!("Configuring DMA with Embassy-style API...");
 
     // Create DMA channel using Embassy-style API
     let dma_ch0 = DmaChannel::new(p.DMA_CH0);
@@ -129,7 +110,7 @@ async fn main(_spawner: Spawner) {
 
         cortex_m::asm::dsb();
 
-        tx.blocking_write(b"Triggering transfer...\r\n").unwrap();
+        defmt::info!("Triggering transfer...");
         dma_ch0.trigger_start();
     }
 
@@ -141,11 +122,8 @@ async fn main(_spawner: Spawner) {
         dma_ch0.clear_done();
     }
 
-    tx.blocking_write(b"\r\nEDMA interleave transfer example finish.\r\n\r\n")
-        .unwrap();
-    tx.blocking_write(b"Destination Buffer (after):  ").unwrap();
-    print_buffer(&mut tx, dst);
-    tx.blocking_write(b"\r\n\r\n").unwrap();
+    defmt::info!("EDMA interleave transfer example finish.");
+    defmt::info!("Destination Buffer (after): {=[?]}", dst.as_slice());
 
     // Verify: Even indices should match SRC_BUFFER[i/2], odd indices should be 0
     let mut mismatch = false;
@@ -156,14 +134,8 @@ async fn main(_spawner: Spawner) {
     }
 
     if mismatch {
-        tx.blocking_write(b"FAIL: Mismatch detected!\r\n").unwrap();
         defmt::error!("FAIL: Mismatch detected!");
     } else {
-        tx.blocking_write(b"PASS: Data verified.\r\n").unwrap();
         defmt::info!("PASS: Data verified.");
     }
-
-    loop {
-        cortex_m::asm::wfe();
-    }
 }
diff --git a/examples/mcxa/src/bin/dma_memset.rs b/examples/mcxa/src/bin/raw_dma_memset.rs
index d7b03e91b..7b3c06ffa 100644
--- a/examples/mcxa/src/bin/dma_memset.rs
+++ b/examples/mcxa/src/bin/raw_dma_memset.rs
@@ -1,5 +1,9 @@
 //! DMA memset example for MCXA276.
 //!
+//! NOTE: this is a "raw dma" example! It exists as a proof of concept, as we don't have
+//! a high-level and safe API for. It should not be taken as typical, recommended, or
+//! stable usage!
+//!
 //! This example demonstrates using DMA to fill a buffer with a repeated pattern.
 //! The source address stays fixed while the destination increments.
 //!
diff --git a/examples/mcxa/src/bin/dma_ping_pong_transfer.rs b/examples/mcxa/src/bin/raw_dma_ping_pong_transfer.rs
index 58f643b80..4a64b2498 100644
--- a/examples/mcxa/src/bin/dma_ping_pong_transfer.rs
+++ b/examples/mcxa/src/bin/raw_dma_ping_pong_transfer.rs
@@ -1,5 +1,9 @@
 //! DMA ping-pong/double-buffer transfer example for MCXA276.
 //!
+//! NOTE: this is a "raw dma" example! It exists as a proof of concept, as we don't have
+//! a high-level and safe API for. It should not be taken as typical, recommended, or
+//! stable usage!
+//!
 //! This example demonstrates two approaches for ping-pong/double-buffering:
 //!
 //! ## Approach 1: Scatter/Gather with linked TCDs (manual)
@@ -23,29 +27,28 @@
 #![no_std]
 #![no_main]
 
-use core::fmt::Write as _;
 use core::sync::atomic::{AtomicBool, Ordering};
 
 use embassy_executor::Spawner;
 use embassy_mcxa::clocks::config::Div8;
 use embassy_mcxa::dma::{self, DmaChannel, Tcd, TransferOptions};
-use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx};
 use embassy_mcxa::{bind_interrupts, pac};
+use static_cell::ConstStaticCell;
 use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
 
 // Source and destination buffers for Approach 1 (scatter/gather)
-static mut SRC: [u32; 8] = [1, 2, 3, 4, 5, 6, 7, 8];
-static mut DST: [u32; 8] = [0; 8];
+static SRC: ConstStaticCell<[u32; 8]> = ConstStaticCell::new([1, 2, 3, 4, 5, 6, 7, 8]);
+static DST: ConstStaticCell<[u32; 8]> = ConstStaticCell::new([0; 8]);
 
 // Source and destination buffers for Approach 2 (wait_half)
-static mut SRC2: [u32; 8] = [0xA1, 0xA2, 0xA3, 0xA4, 0xB1, 0xB2, 0xB3, 0xB4];
-static mut DST2: [u32; 8] = [0; 8];
+static SRC2: ConstStaticCell<[u32; 8]> = ConstStaticCell::new([0xA1, 0xA2, 0xA3, 0xA4, 0xB1, 0xB2, 0xB3, 0xB4]);
+static DST2: ConstStaticCell<[u32; 8]> = ConstStaticCell::new([0; 8]);
 
 // TCD pool for scatter/gather - must be 32-byte aligned
 #[repr(C, align(32))]
 struct TcdPool([Tcd; 2]);
 
-static mut TCD_POOL: TcdPool = TcdPool(
+static TCD_POOL: ConstStaticCell<TcdPool> = ConstStaticCell::new(TcdPool(
     [Tcd {
         saddr: 0,
         soff: 0,
@@ -59,7 +62,7 @@ static mut TCD_POOL: TcdPool = TcdPool(
         csr: 0,
         biter: 0,
     }; 2],
-);
+));
 
 // AtomicBool to track scatter/gather completion
 // Note: With ESG=1, DONE bit is cleared by hardware when next TCD loads,
@@ -87,11 +90,6 @@ bind_interrupts!(struct Irqs {
     DMA_CH0 => PingPongDmaHandler;
 });
 
-/// Helper to print a buffer to UART
-fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) {
-    write!(tx, "{:?}", unsafe { core::slice::from_raw_parts(buf_ptr, len) }).ok();
-}
-
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
     // Small delay to allow probe-rs to attach after reset
@@ -106,38 +104,16 @@ async fn main(_spawner: Spawner) {
 
     defmt::info!("DMA ping-pong transfer example starting...");
 
-    // Enable DMA interrupt (DMA clock/reset/init is handled automatically by HAL)
-    unsafe {
-        cortex_m::peripheral::NVIC::unmask(pac::Interrupt::DMA_CH0);
-    }
-
-    let config = Config {
-        baudrate_bps: 115_200,
-        ..Default::default()
-    };
-
-    let lpuart = Lpuart::new_blocking(p.LPUART2, p.P2_2, p.P2_3, config).unwrap();
-    let (mut tx, _rx) = lpuart.split();
-
-    tx.blocking_write(b"EDMA ping-pong transfer example begin.\r\n\r\n")
-        .unwrap();
+    defmt::info!("EDMA ping-pong transfer example begin.");
 
     // Initialize buffers
-    unsafe {
-        SRC = [1, 2, 3, 4, 5, 6, 7, 8];
-        DST = [0; 8];
-    }
-
-    tx.blocking_write(b"Source Buffer:              ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(SRC) as *const u32, 8);
-    tx.blocking_write(b"\r\n").unwrap();
+    let src = SRC.take();
+    let dst = DST.take();
 
-    tx.blocking_write(b"Destination Buffer (before): ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(DST) as *const u32, 8);
-    tx.blocking_write(b"\r\n").unwrap();
+    defmt::info!("Source Buffer: {=[?]}", src.as_slice());
+    defmt::info!("Destination Buffer (before): {=[?]}", dst.as_slice());
 
-    tx.blocking_write(b"Configuring ping-pong DMA with Embassy-style API...\r\n")
-        .unwrap();
+    defmt::info!("Configuring ping-pong DMA with Embassy-style API...");
 
     let dma_ch0 = DmaChannel::new(p.DMA_CH0);
 
@@ -146,9 +122,7 @@ async fn main(_spawner: Spawner) {
     // TCD0 transfers first half (SRC[0..4] -> DST[0..4]), links to TCD1.
     // TCD1 transfers second half (SRC[4..8] -> DST[4..8]), links to TCD0.
     unsafe {
-        let tcds = &mut *core::ptr::addr_of_mut!(TCD_POOL.0);
-        let src_ptr = core::ptr::addr_of!(SRC) as *const u32;
-        let dst_ptr = core::ptr::addr_of_mut!(DST) as *mut u32;
+        let tcds = &mut TCD_POOL.take().0;
 
         let half_len = 4usize;
         let half_bytes = (half_len * 4) as u32;
@@ -158,12 +132,12 @@ async fn main(_spawner: Spawner) {
 
         // TCD0: First half -> Links to TCD1
         tcds[0] = Tcd {
-            saddr: src_ptr as u32,
+            saddr: src.as_ptr() as u32,
             soff: 4,
             attr: 0x0202, // 32-bit src/dst
             nbytes: half_bytes,
             slast: 0,
-            daddr: dst_ptr as u32,
+            daddr: dst.as_mut_ptr() as u32,
             doff: 4,
             citer: 1,
             dlast_sga: tcd1_addr as i32,
@@ -173,12 +147,12 @@ async fn main(_spawner: Spawner) {
 
         // TCD1: Second half -> Links to TCD0
         tcds[1] = Tcd {
-            saddr: src_ptr.add(half_len) as u32,
+            saddr: src.as_ptr().add(half_len) as u32,
             soff: 4,
             attr: 0x0202,
             nbytes: half_bytes,
             slast: 0,
-            daddr: dst_ptr.add(half_len) as u32,
+            daddr: dst.as_mut_ptr().add(half_len) as u32,
             doff: 4,
             citer: 1,
             dlast_sga: tcd0_addr as i32,
@@ -190,7 +164,7 @@ async fn main(_spawner: Spawner) {
         dma_ch0.load_tcd(&tcds[0]);
     }
 
-    tx.blocking_write(b"Triggering first half transfer...\r\n").unwrap();
+    defmt::info!("Triggering first half transfer...");
 
     // Trigger first transfer (first half: SRC[0..4] -> DST[0..4])
     unsafe {
@@ -203,8 +177,8 @@ async fn main(_spawner: Spawner) {
     }
     TRANSFER_DONE.store(false, Ordering::Release);
 
-    tx.blocking_write(b"First half transferred.\r\n").unwrap();
-    tx.blocking_write(b"Triggering second half transfer...\r\n").unwrap();
+    defmt::info!("First half transferred.");
+    defmt::info!("Triggering second half transfer...");
 
     // Trigger second transfer (second half: SRC[4..8] -> DST[4..8])
     unsafe {
@@ -217,32 +191,17 @@ async fn main(_spawner: Spawner) {
     }
     TRANSFER_DONE.store(false, Ordering::Release);
 
-    tx.blocking_write(b"Second half transferred.\r\n\r\n").unwrap();
+    defmt::info!("Second half transferred.");
 
-    tx.blocking_write(b"EDMA ping-pong transfer example finish.\r\n\r\n")
-        .unwrap();
-    tx.blocking_write(b"Destination Buffer (after):  ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(DST) as *const u32, 8);
-    tx.blocking_write(b"\r\n\r\n").unwrap();
+    defmt::info!("EDMA ping-pong transfer example finish.");
+    defmt::info!("Destination Buffer (after): {=[?]}", dst.as_slice());
 
     // Verify: DST should match SRC
-    let mut mismatch = false;
-    unsafe {
-        let src_ptr = core::ptr::addr_of!(SRC) as *const u32;
-        let dst_ptr = core::ptr::addr_of!(DST) as *const u32;
-        for i in 0..8 {
-            if *src_ptr.add(i) != *dst_ptr.add(i) {
-                mismatch = true;
-                break;
-            }
-        }
-    }
+    let mismatch = src != dst;
 
     if mismatch {
-        tx.blocking_write(b"FAIL: Approach 1 mismatch detected!\r\n").unwrap();
         defmt::error!("FAIL: Approach 1 mismatch detected!");
     } else {
-        tx.blocking_write(b"PASS: Approach 1 data verified.\r\n\r\n").unwrap();
         defmt::info!("PASS: Approach 1 data verified.");
     }
 
@@ -260,8 +219,7 @@ async fn main(_spawner: Spawner) {
     // - True async/await support
     // - Good for streaming data processing
 
-    tx.blocking_write(b"--- Approach 2: wait_half() demo ---\r\n\r\n")
-        .unwrap();
+    defmt::info!("--- Approach 2: wait_half() demo ---");
 
     // Enable DMA CH1 interrupt
     unsafe {
@@ -269,14 +227,10 @@ async fn main(_spawner: Spawner) {
     }
 
     // Initialize approach 2 buffers
-    unsafe {
-        SRC2 = [0xA1, 0xA2, 0xA3, 0xA4, 0xB1, 0xB2, 0xB3, 0xB4];
-        DST2 = [0; 8];
-    }
+    let src2 = SRC2.take();
+    let dst2 = DST2.take();
 
-    tx.blocking_write(b"SRC2: ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(SRC2) as *const u32, 8);
-    tx.blocking_write(b"\r\n").unwrap();
+    defmt::info!("SRC2: {=[?]}", src2.as_slice());
 
     let dma_ch1 = DmaChannel::new(p.DMA_CH1);
 
@@ -285,63 +239,31 @@ async fn main(_spawner: Spawner) {
     options.half_transfer_interrupt = true; // Enable half-transfer interrupt
     options.complete_transfer_interrupt = true;
 
-    tx.blocking_write(b"Starting transfer with half_transfer_interrupt...\r\n")
-        .unwrap();
+    defmt::info!("Starting transfer with half_transfer_interrupt...");
 
-    unsafe {
-        let src = &*core::ptr::addr_of!(SRC2);
-        let dst = &mut *core::ptr::addr_of_mut!(DST2);
-
-        // Create the transfer
-        let mut transfer = dma_ch1.mem_to_mem(src, dst, options);
-
-        // Wait for half-transfer (first 4 elements)
-        tx.blocking_write(b"Waiting for first half...\r\n").unwrap();
-        let half_ok = transfer.wait_half().await;
-
-        if half_ok {
-            tx.blocking_write(b"Half-transfer complete! First half of DST2: ")
-                .unwrap();
-            print_buffer(&mut tx, core::ptr::addr_of!(DST2) as *const u32, 4);
-            tx.blocking_write(b"\r\n").unwrap();
-            tx.blocking_write(b"(Processing first half while second half transfers...)\r\n")
-                .unwrap();
-        }
-
-        // Wait for complete transfer
-        tx.blocking_write(b"Waiting for second half...\r\n").unwrap();
-        transfer.await;
-    }
+    // Create the transfer
+    let mut transfer = dma_ch1.mem_to_mem(src2, dst2, options);
+
+    // Wait for half-transfer (first 4 elements)
+    defmt::info!("Waiting for first half...");
+    let _ok = transfer.wait_half().await;
 
-    tx.blocking_write(b"Transfer complete! Full DST2: ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(DST2) as *const u32, 8);
-    tx.blocking_write(b"\r\n\r\n").unwrap();
+    defmt::info!("Half-transfer complete!");
+
+    // Wait for complete transfer
+    defmt::info!("Waiting for second half...");
+    transfer.await;
+
+    defmt::info!("Transfer complete! Full DST2: {=[?]}", dst2.as_slice());
 
     // Verify approach 2
-    let mut mismatch2 = false;
-    unsafe {
-        let src_ptr = core::ptr::addr_of!(SRC2) as *const u32;
-        let dst_ptr = core::ptr::addr_of!(DST2) as *const u32;
-        for i in 0..8 {
-            if *src_ptr.add(i) != *dst_ptr.add(i) {
-                mismatch2 = true;
-                break;
-            }
-        }
-    }
+    let mismatch2 = src2 != dst2;
 
     if mismatch2 {
-        tx.blocking_write(b"FAIL: Approach 2 mismatch!\r\n").unwrap();
         defmt::error!("FAIL: Approach 2 mismatch!");
     } else {
-        tx.blocking_write(b"PASS: Approach 2 verified.\r\n").unwrap();
         defmt::info!("PASS: Approach 2 verified.");
     }
 
-    tx.blocking_write(b"\r\n=== All ping-pong demos complete ===\r\n")
-        .unwrap();
-
-    loop {
-        cortex_m::asm::wfe();
-    }
+    defmt::info!("=== All ping-pong demos complete ===");
 }
diff --git a/examples/mcxa/src/bin/dma_scatter_gather.rs b/examples/mcxa/src/bin/raw_dma_scatter_gather.rs
index 3e34e95b1..057e56826 100644
--- a/examples/mcxa/src/bin/dma_scatter_gather.rs
+++ b/examples/mcxa/src/bin/raw_dma_scatter_gather.rs
@@ -1,5 +1,9 @@
 //! DMA scatter-gather transfer example for MCXA276.
 //!
+//! NOTE: this is a "raw dma" example! It exists as a proof of concept, as we don't have
+//! a high-level and safe API for. It should not be taken as typical, recommended, or
+//! stable usage!
+//!
 //! This example demonstrates using DMA with scatter/gather to chain multiple
 //! transfer descriptors. The first TCD transfers the first half of the buffer,
 //! then automatically loads the second TCD to transfer the second half.
@@ -12,25 +16,24 @@
 #![no_std]
 #![no_main]
 
-use core::fmt::Write as _;
 use core::sync::atomic::{AtomicBool, Ordering};
 
 use embassy_executor::Spawner;
+use embassy_mcxa::bind_interrupts;
 use embassy_mcxa::clocks::config::Div8;
 use embassy_mcxa::dma::{self, DmaChannel, Tcd};
-use embassy_mcxa::lpuart::{Blocking, Config, Lpuart, LpuartTx};
-use embassy_mcxa::{bind_interrupts, pac};
+use static_cell::ConstStaticCell;
 use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
 
 // Source and destination buffers
-static mut SRC: [u32; 8] = [1, 2, 3, 4, 5, 6, 7, 8];
-static mut DST: [u32; 8] = [0; 8];
+static SRC: ConstStaticCell<[u32; 8]> = ConstStaticCell::new([1, 2, 3, 4, 5, 6, 7, 8]);
+static DST: ConstStaticCell<[u32; 8]> = ConstStaticCell::new([0; 8]);
 
 // TCD pool for scatter/gather - must be 32-byte aligned
 #[repr(C, align(32))]
 struct TcdPool([Tcd; 2]);
 
-static mut TCD_POOL: TcdPool = TcdPool(
+static TCD_POOL: ConstStaticCell<TcdPool> = ConstStaticCell::new(TcdPool(
     [Tcd {
         saddr: 0,
         soff: 0,
@@ -44,7 +47,7 @@ static mut TCD_POOL: TcdPool = TcdPool(
         csr: 0,
         biter: 0,
     }; 2],
-);
+));
 
 // AtomicBool to track scatter/gather completion
 // Note: With ESG=1, DONE bit is cleared by hardware when next TCD loads,
@@ -73,11 +76,6 @@ bind_interrupts!(struct Irqs {
     DMA_CH0 => ScatterGatherDmaHandler;
 });
 
-/// Helper to print a buffer to UART
-fn print_buffer(tx: &mut LpuartTx<'_, Blocking>, buf_ptr: *const u32, len: usize) {
-    write!(tx, "{:?}", unsafe { core::slice::from_raw_parts(buf_ptr, len) }).ok();
-}
-
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
     // Small delay to allow probe-rs to attach after reset
@@ -92,40 +90,15 @@ async fn main(_spawner: Spawner) {
 
     defmt::info!("DMA scatter-gather transfer example starting...");
 
-    // DMA is initialized during hal::init() - no need to call ensure_init()
-
-    // Enable DMA interrupt
-    unsafe {
-        cortex_m::peripheral::NVIC::unmask(pac::Interrupt::DMA_CH0);
-    }
-
-    let config = Config {
-        baudrate_bps: 115_200,
-        ..Default::default()
-    };
-
-    let lpuart = Lpuart::new_blocking(p.LPUART2, p.P2_2, p.P2_3, config).unwrap();
-    let (mut tx, _rx) = lpuart.split();
-
-    tx.blocking_write(b"EDMA scatter-gather transfer example begin.\r\n\r\n")
-        .unwrap();
+    defmt::info!("EDMA scatter-gather transfer example begin.");
 
     // Initialize buffers
-    unsafe {
-        SRC = [1, 2, 3, 4, 5, 6, 7, 8];
-        DST = [0; 8];
-    }
-
-    tx.blocking_write(b"Source Buffer:              ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(SRC) as *const u32, 8);
-    tx.blocking_write(b"\r\n").unwrap();
+    let src = SRC.take();
+    let dst = DST.take();
 
-    tx.blocking_write(b"Destination Buffer (before): ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(DST) as *const u32, 8);
-    tx.blocking_write(b"\r\n").unwrap();
-
-    tx.blocking_write(b"Configuring scatter-gather DMA with Embassy-style API...\r\n")
-        .unwrap();
+    defmt::info!("Source Buffer: {=[?]}", src.as_slice());
+    defmt::info!("Destination Buffer (before): {=[?]}", dst.as_slice());
+    defmt::info!("Configuring scatter-gather DMA with Embassy-style API...");
 
     let dma_ch0 = DmaChannel::new(p.DMA_CH0);
 
@@ -134,9 +107,9 @@ async fn main(_spawner: Spawner) {
     // TCD0 transfers first half (SRC[0..4] -> DST[0..4]), then loads TCD1.
     // TCD1 transfers second half (SRC[4..8] -> DST[4..8]), last TCD.
     unsafe {
-        let tcds = core::slice::from_raw_parts_mut(core::ptr::addr_of_mut!(TCD_POOL.0) as *mut Tcd, 2);
-        let src_ptr = core::ptr::addr_of!(SRC) as *const u32;
-        let dst_ptr = core::ptr::addr_of_mut!(DST) as *mut u32;
+        let tcds = &mut TCD_POOL.take().0;
+        let src_ptr = src.as_ptr();
+        let dst_ptr = dst.as_mut_ptr();
 
         let num_tcds = 2usize;
         let chunk_len = 4usize; // 8 / 2
@@ -170,7 +143,7 @@ async fn main(_spawner: Spawner) {
         dma_ch0.load_tcd(&tcds[0]);
     }
 
-    tx.blocking_write(b"Triggering first half transfer...\r\n").unwrap();
+    defmt::info!("Triggering first half transfer...");
 
     // Trigger first transfer (first half: SRC[0..4] -> DST[0..4])
     // TCD0 is currently loaded.
@@ -184,8 +157,8 @@ async fn main(_spawner: Spawner) {
     }
     TRANSFER_DONE.store(false, Ordering::Release);
 
-    tx.blocking_write(b"First half transferred.\r\n").unwrap();
-    tx.blocking_write(b"Triggering second half transfer...\r\n").unwrap();
+    defmt::info!("First half transferred.");
+    defmt::info!("Triggering second half transfer...");
 
     // Trigger second transfer (second half: SRC[4..8] -> DST[4..8])
     // TCD1 should have been loaded by the scatter/gather engine.
@@ -199,36 +172,17 @@ async fn main(_spawner: Spawner) {
     }
     TRANSFER_DONE.store(false, Ordering::Release);
 
-    tx.blocking_write(b"Second half transferred.\r\n\r\n").unwrap();
+    defmt::info!("Second half transferred.");
 
-    tx.blocking_write(b"EDMA scatter-gather transfer example finish.\r\n\r\n")
-        .unwrap();
-    tx.blocking_write(b"Destination Buffer (after):  ").unwrap();
-    print_buffer(&mut tx, core::ptr::addr_of!(DST) as *const u32, 8);
-    tx.blocking_write(b"\r\n\r\n").unwrap();
+    defmt::info!("EDMA scatter-gather transfer example finish.");
+    defmt::info!("Destination Buffer (after): {=[?]}", dst.as_slice());
 
     // Verify: DST should match SRC
-    let mut mismatch = false;
-    unsafe {
-        let src_ptr = core::ptr::addr_of!(SRC) as *const u32;
-        let dst_ptr = core::ptr::addr_of!(DST) as *const u32;
-        for i in 0..8 {
-            if *src_ptr.add(i) != *dst_ptr.add(i) {
-                mismatch = true;
-                break;
-            }
-        }
-    }
+    let mismatch = src != dst;
 
     if mismatch {
-        tx.blocking_write(b"FAIL: Mismatch detected!\r\n").unwrap();
         defmt::error!("FAIL: Mismatch detected!");
     } else {
-        tx.blocking_write(b"PASS: Data verified.\r\n").unwrap();
         defmt::info!("PASS: Data verified.");
     }
-
-    loop {
-        cortex_m::asm::wfe();
-    }
 }