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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2022-04-02 13:30:32 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2022-04-02 13:30:32 +0000 |
| commit | b0de865e0b4bf5cb6782d61d668125850ceb8e3b (patch) | |
| tree | 38a1aba6bd53da4c60c7905260c0a65f248dc214 /examples/nrf/src/bin/uart_split.rs | |
| parent | 0eea6fd6b5eeda740a1b5cd47ed8e48e0e3d0c61 (diff) | |
| parent | 1f59f8e7d0a6e89a8a2eba2a9fcac0c0657672dc (diff) | |
Merge #691
691: Add pllsai1 and allow for 120Mhz clock on stm32l4+ r=Dirbaio a=ant32
Co-authored-by: Philip A Reimer <[email protected]>
Diffstat (limited to 'examples/nrf/src/bin/uart_split.rs')
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