diff options
| author | Dario Nieuwenhuis <[email protected]> | 2021-08-02 20:28:54 +0200 |
|---|---|---|
| committer | GitHub <[email protected]> | 2021-08-02 20:28:54 +0200 |
| commit | 9ca43752eb121cc6614f456fc6c8753deae3fa62 (patch) | |
| tree | da16008285a54746a07bdf7881a4fce4cbf8d23e /examples/nrf | |
| parent | de207764aee0dd9c23bd02f92b55a55babd47b1a (diff) | |
| parent | 3f28bb6c77de3d8ecbb6d401f107586f24e416a4 (diff) | |
Merge pull request #327 from embassy-rs/remove-pin
PeripheralMutex: Remove Pin
Diffstat (limited to 'examples/nrf')
| -rw-r--r-- | examples/nrf/src/bin/buffered_uart.rs | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/examples/nrf/src/bin/buffered_uart.rs b/examples/nrf/src/bin/buffered_uart.rs index c800e64fc..a78d2df44 100644 --- a/examples/nrf/src/bin/buffered_uart.rs +++ b/examples/nrf/src/bin/buffered_uart.rs | |||
| @@ -11,6 +11,7 @@ mod example_common; | |||
| 11 | use defmt::panic; | 11 | use defmt::panic; |
| 12 | use embassy::executor::Spawner; | 12 | use embassy::executor::Spawner; |
| 13 | use embassy::io::{AsyncBufReadExt, AsyncWriteExt}; | 13 | use embassy::io::{AsyncBufReadExt, AsyncWriteExt}; |
| 14 | use embassy_nrf::buffered_uarte::State; | ||
| 14 | use embassy_nrf::gpio::NoPin; | 15 | use embassy_nrf::gpio::NoPin; |
| 15 | use embassy_nrf::{buffered_uarte::BufferedUarte, interrupt, uarte, Peripherals}; | 16 | use embassy_nrf::{buffered_uarte::BufferedUarte, interrupt, uarte, Peripherals}; |
| 16 | use example_common::*; | 17 | use example_common::*; |
| @@ -26,8 +27,10 @@ async fn main(_spawner: Spawner, p: Peripherals) { | |||
| 26 | let mut rx_buffer = [0u8; 4096]; | 27 | let mut rx_buffer = [0u8; 4096]; |
| 27 | 28 | ||
| 28 | let irq = interrupt::take!(UARTE0_UART0); | 29 | let irq = interrupt::take!(UARTE0_UART0); |
| 30 | let mut state = State::new(); | ||
| 29 | let u = unsafe { | 31 | let u = unsafe { |
| 30 | BufferedUarte::new( | 32 | BufferedUarte::new( |
| 33 | &mut state, | ||
| 31 | p.UARTE0, | 34 | p.UARTE0, |
| 32 | p.TIMER0, | 35 | p.TIMER0, |
| 33 | p.PPI_CH0, | 36 | p.PPI_CH0, |
