diff options
| author | 9names <[email protected]> | 2025-02-16 13:04:59 +1100 |
|---|---|---|
| committer | 9names <[email protected]> | 2025-02-16 15:43:08 +1100 |
| commit | 6b1706434dfeb80b3659f3d2a1bbe2871ec8ea55 (patch) | |
| tree | 38ae69ca2fe80726b8b88d7641aa94a3cfebc8e6 /examples/rp23/src/bin/uart_buffered_split.rs | |
| parent | 4cc5ab9474773148dd8976e22f3fb6f5e270cd3a (diff) | |
Remove ImageDef from rp23 examples
Diffstat (limited to 'examples/rp23/src/bin/uart_buffered_split.rs')
| -rw-r--r-- | examples/rp23/src/bin/uart_buffered_split.rs | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/examples/rp23/src/bin/uart_buffered_split.rs b/examples/rp23/src/bin/uart_buffered_split.rs index 9ed130727..468d2b61a 100644 --- a/examples/rp23/src/bin/uart_buffered_split.rs +++ b/examples/rp23/src/bin/uart_buffered_split.rs | |||
| @@ -10,7 +10,6 @@ | |||
| 10 | use defmt::*; | 10 | use defmt::*; |
| 11 | use embassy_executor::Spawner; | 11 | use embassy_executor::Spawner; |
| 12 | use embassy_rp::bind_interrupts; | 12 | use embassy_rp::bind_interrupts; |
| 13 | use embassy_rp::block::ImageDef; | ||
| 14 | use embassy_rp::peripherals::UART0; | 13 | use embassy_rp::peripherals::UART0; |
| 15 | use embassy_rp::uart::{BufferedInterruptHandler, BufferedUart, BufferedUartRx, Config}; | 14 | use embassy_rp::uart::{BufferedInterruptHandler, BufferedUart, BufferedUartRx, Config}; |
| 16 | use embassy_time::Timer; | 15 | use embassy_time::Timer; |
| @@ -18,10 +17,6 @@ use embedded_io_async::{Read, Write}; | |||
| 18 | use static_cell::StaticCell; | 17 | use static_cell::StaticCell; |
| 19 | use {defmt_rtt as _, panic_probe as _}; | 18 | use {defmt_rtt as _, panic_probe as _}; |
| 20 | 19 | ||
| 21 | #[link_section = ".start_block"] | ||
| 22 | #[used] | ||
| 23 | pub static IMAGE_DEF: ImageDef = ImageDef::secure_exe(); | ||
| 24 | |||
| 25 | bind_interrupts!(struct Irqs { | 20 | bind_interrupts!(struct Irqs { |
| 26 | UART0_IRQ => BufferedInterruptHandler<UART0>; | 21 | UART0_IRQ => BufferedInterruptHandler<UART0>; |
| 27 | }); | 22 | }); |
