diff options
| author | Dario Nieuwenhuis <[email protected]> | 2024-02-12 02:17:33 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2024-02-12 02:19:31 +0100 |
| commit | 0dc5e6d3e4646fd8f67840f32a756d55ac36569a (patch) | |
| tree | f98bf4bdc7fd28748b7700c6c6702b276d1dc06a /examples/stm32f334/src/bin/adc.rs | |
| parent | edb3989b577a15bed3d0434f25edc20b6f24bf52 (diff) | |
stm32/rcc: port F3 RCC to new API
See #2515
Diffstat (limited to 'examples/stm32f334/src/bin/adc.rs')
| -rw-r--r-- | examples/stm32f334/src/bin/adc.rs | 24 |
1 files changed, 17 insertions, 7 deletions
diff --git a/examples/stm32f334/src/bin/adc.rs b/examples/stm32f334/src/bin/adc.rs index 063ee9dac..a9fb7f1a6 100644 --- a/examples/stm32f334/src/bin/adc.rs +++ b/examples/stm32f334/src/bin/adc.rs | |||
| @@ -5,7 +5,6 @@ use defmt::info; | |||
| 5 | use embassy_executor::Spawner; | 5 | use embassy_executor::Spawner; |
| 6 | use embassy_stm32::adc::{Adc, SampleTime}; | 6 | use embassy_stm32::adc::{Adc, SampleTime}; |
| 7 | use embassy_stm32::peripherals::ADC1; | 7 | use embassy_stm32::peripherals::ADC1; |
| 8 | use embassy_stm32::rcc::{AdcClockSource, Adcpres}; | ||
| 9 | use embassy_stm32::time::mhz; | 8 | use embassy_stm32::time::mhz; |
| 10 | use embassy_stm32::{adc, bind_interrupts, Config}; | 9 | use embassy_stm32::{adc, bind_interrupts, Config}; |
| 11 | use embassy_time::{Delay, Timer}; | 10 | use embassy_time::{Delay, Timer}; |
| @@ -18,12 +17,23 @@ bind_interrupts!(struct Irqs { | |||
| 18 | #[embassy_executor::main] | 17 | #[embassy_executor::main] |
| 19 | async fn main(_spawner: Spawner) -> ! { | 18 | async fn main(_spawner: Spawner) -> ! { |
| 20 | let mut config = Config::default(); | 19 | let mut config = Config::default(); |
| 21 | config.rcc.sysclk = Some(mhz(64)); | 20 | { |
| 22 | config.rcc.hclk = Some(mhz(64)); | 21 | use embassy_stm32::rcc::*; |
| 23 | config.rcc.pclk1 = Some(mhz(32)); | 22 | config.rcc.hse = Some(Hse { |
| 24 | config.rcc.pclk2 = Some(mhz(64)); | 23 | freq: mhz(8), |
| 25 | config.rcc.adc = Some(AdcClockSource::Pll(Adcpres::DIV1)); | 24 | mode: HseMode::Bypass, |
| 26 | 25 | }); | |
| 26 | config.rcc.pll = Some(Pll { | ||
| 27 | src: PllSource::HSE, | ||
| 28 | prediv: PllPreDiv::DIV1, | ||
| 29 | mul: PllMul::MUL9, | ||
| 30 | }); | ||
| 31 | config.rcc.sys = Sysclk::PLL1_P; | ||
| 32 | config.rcc.ahb_pre = AHBPrescaler::DIV1; | ||
| 33 | config.rcc.apb1_pre = APBPrescaler::DIV2; | ||
| 34 | config.rcc.apb2_pre = APBPrescaler::DIV1; | ||
| 35 | config.rcc.adc = AdcClockSource::Pll(AdcPllPrescaler::DIV1); | ||
| 36 | } | ||
| 27 | let mut p = embassy_stm32::init(config); | 37 | let mut p = embassy_stm32::init(config); |
| 28 | 38 | ||
| 29 | info!("create adc..."); | 39 | info!("create adc..."); |
