diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-10-18 04:31:53 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-10-18 05:11:31 +0200 |
| commit | f20f170b1fa97a86e9d9258ac5cea248203580fb (patch) | |
| tree | 2a5678ff5f825cbfa73f003b0a7b3992fad0eb70 /examples/stm32f4/src/bin/usb_serial.rs | |
| parent | 67010d123c874383f48ccd5c1b2287907677e460 (diff) | |
stm32/rcc: refactor and unify f4 into f7.
Diffstat (limited to 'examples/stm32f4/src/bin/usb_serial.rs')
| -rw-r--r-- | examples/stm32f4/src/bin/usb_serial.rs | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/examples/stm32f4/src/bin/usb_serial.rs b/examples/stm32f4/src/bin/usb_serial.rs index 4ff6452ef..004ff038d 100644 --- a/examples/stm32f4/src/bin/usb_serial.rs +++ b/examples/stm32f4/src/bin/usb_serial.rs | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | 4 | ||
| 5 | use defmt::{panic, *}; | 5 | use defmt::{panic, *}; |
| 6 | use embassy_executor::Spawner; | 6 | use embassy_executor::Spawner; |
| 7 | use embassy_stm32::time::mhz; | 7 | use embassy_stm32::time::Hertz; |
| 8 | use embassy_stm32::usb_otg::{Driver, Instance}; | 8 | use embassy_stm32::usb_otg::{Driver, Instance}; |
| 9 | use embassy_stm32::{bind_interrupts, peripherals, usb_otg, Config}; | 9 | use embassy_stm32::{bind_interrupts, peripherals, usb_otg, Config}; |
| 10 | use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; | 10 | use embassy_usb::class::cdc_acm::{CdcAcmClass, State}; |
| @@ -22,9 +22,25 @@ async fn main(_spawner: Spawner) { | |||
| 22 | info!("Hello World!"); | 22 | info!("Hello World!"); |
| 23 | 23 | ||
| 24 | let mut config = Config::default(); | 24 | let mut config = Config::default(); |
| 25 | config.rcc.pll48 = true; | 25 | { |
| 26 | config.rcc.sys_ck = Some(mhz(48)); | 26 | use embassy_stm32::rcc::*; |
| 27 | 27 | config.rcc.hse = Some(Hse { | |
| 28 | freq: Hertz(8_000_000), | ||
| 29 | mode: HseMode::Bypass, | ||
| 30 | }); | ||
| 31 | config.rcc.pll_src = PllSource::HSE; | ||
| 32 | config.rcc.pll = Some(Pll { | ||
| 33 | prediv: PllPreDiv::DIV4, | ||
| 34 | mul: PllMul::MUL168, | ||
| 35 | divp: Some(Pllp::DIV2), // 8mhz / 4 * 168 / 2 = 168Mhz. | ||
| 36 | divq: Some(Pllq::DIV7), // 8mhz / 4 * 168 / 7 = 48Mhz. | ||
| 37 | divr: None, | ||
| 38 | }); | ||
| 39 | config.rcc.ahb_pre = AHBPrescaler::DIV1; | ||
| 40 | config.rcc.apb1_pre = APBPrescaler::DIV4; | ||
| 41 | config.rcc.apb2_pre = APBPrescaler::DIV2; | ||
| 42 | config.rcc.sys = Sysclk::PLL1_P; | ||
| 43 | } | ||
| 28 | let p = embassy_stm32::init(config); | 44 | let p = embassy_stm32::init(config); |
| 29 | 45 | ||
| 30 | // Create the driver, from the HAL. | 46 | // Create the driver, from the HAL. |
