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| author | bors[bot] <26634292+bors[bot]@users.noreply.github.com> | 2023-02-19 22:03:13 +0000 |
|---|---|---|
| committer | GitHub <[email protected]> | 2023-02-19 22:03:13 +0000 |
| commit | 4fd59f26fbb75d277c1084ce496342c358ee99af (patch) | |
| tree | 1fdd40bf8082138412a43756f440c5788c4366f9 /examples/stm32f7/src | |
| parent | e3f8020c3bdf726dfa451b5b190f27191507a18f (diff) | |
| parent | 272982ee5417ea6bdd5873e36717ba9ae9a59ee4 (diff) | |
Merge #1220
1220: examples/stm32wb: fix linker script. r=Dirbaio a=Dirbaio
cortex-m-rt 0.7.2 now enforces the stack is 8-byte aligned. Stack is placed at `ORIGIN(RAM) + LENGTH(RAM)` by default, which wasn't 8-byte-aligned. See https://github.com/rust-embedded/cortex-m/discussions/469
ST trims 8 bytes from start of RAM, and uses the whole 192kb, so let's just copy that:
https://github.com/STMicroelectronics/STM32CubeWB/blob/bceb1dae09f912eae47fba059251d499ba32f4ca/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/linker/stm32wb55xx_flash_cm4.ld#L48
bors r+
Co-authored-by: Dario Nieuwenhuis <[email protected]>
Diffstat (limited to 'examples/stm32f7/src')
0 files changed, 0 insertions, 0 deletions