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authorMarkus Kasten <[email protected]>2025-01-17 12:45:05 +0100
committerMarkus Kasten <[email protected]>2025-01-17 12:45:58 +0100
commit083f584f29b092a68f99120373dc6ec60fe6bc3d (patch)
tree99acd6e742941878221e52d9cee70a36b62e477c /examples/stm32g0
parentb40d30f0ac488791f55056227ca33fc2bb08937e (diff)
examples/stm32: fix g0 hftimer example with hsi sys_div
Diffstat (limited to 'examples/stm32g0')
-rw-r--r--examples/stm32g0/src/bin/hf_timer.rs4
1 files changed, 3 insertions, 1 deletions
diff --git a/examples/stm32g0/src/bin/hf_timer.rs b/examples/stm32g0/src/bin/hf_timer.rs
index 3ea06cdee..dfb6e0edc 100644
--- a/examples/stm32g0/src/bin/hf_timer.rs
+++ b/examples/stm32g0/src/bin/hf_timer.rs
@@ -16,7 +16,9 @@ async fn main(_spawner: Spawner) {
16 let mut config = PeripheralConfig::default(); 16 let mut config = PeripheralConfig::default();
17 { 17 {
18 use embassy_stm32::rcc::*; 18 use embassy_stm32::rcc::*;
19 config.rcc.hsi = true; 19 config.rcc.hsi = Some(Hsi {
20 sys_div: HsiSysDiv::DIV1,
21 });
20 config.rcc.pll = Some(Pll { 22 config.rcc.pll = Some(Pll {
21 source: PllSource::HSI, 23 source: PllSource::HSI,
22 prediv: PllPreDiv::DIV1, 24 prediv: PllPreDiv::DIV1,