diff options
| author | xoviat <[email protected]> | 2023-09-16 17:41:11 -0500 |
|---|---|---|
| committer | xoviat <[email protected]> | 2023-09-16 17:41:11 -0500 |
| commit | de2773afdd3f2d06cad0632ee075e1b88aa71515 (patch) | |
| tree | 6782dfb9aec3b5ba87f6e68eedf8910d4ead3869 /examples/stm32h5/src/bin/eth.rs | |
| parent | 044b837caaa90ce4a52a2f2f5be8a657e6ff61a7 (diff) | |
stm32/rcc: convert bus prescalers to pac enums
Diffstat (limited to 'examples/stm32h5/src/bin/eth.rs')
| -rw-r--r-- | examples/stm32h5/src/bin/eth.rs | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/examples/stm32h5/src/bin/eth.rs b/examples/stm32h5/src/bin/eth.rs index c32e0fdb5..fdba6cd5c 100644 --- a/examples/stm32h5/src/bin/eth.rs +++ b/examples/stm32h5/src/bin/eth.rs | |||
| @@ -48,10 +48,10 @@ async fn main(spawner: Spawner) -> ! { | |||
| 48 | divq: Some(2), | 48 | divq: Some(2), |
| 49 | divr: None, | 49 | divr: None, |
| 50 | }); | 50 | }); |
| 51 | config.rcc.ahb_pre = AHBPrescaler::NotDivided; | 51 | config.rcc.ahb_pre = AHBPrescaler::DIV1; |
| 52 | config.rcc.apb1_pre = APBPrescaler::NotDivided; | 52 | config.rcc.apb1_pre = APBPrescaler::DIV1; |
| 53 | config.rcc.apb2_pre = APBPrescaler::NotDivided; | 53 | config.rcc.apb2_pre = APBPrescaler::DIV1; |
| 54 | config.rcc.apb3_pre = APBPrescaler::NotDivided; | 54 | config.rcc.apb3_pre = APBPrescaler::DIV1; |
| 55 | config.rcc.sys = Sysclk::Pll1P; | 55 | config.rcc.sys = Sysclk::Pll1P; |
| 56 | config.rcc.voltage_scale = VoltageScale::Scale0; | 56 | config.rcc.voltage_scale = VoltageScale::Scale0; |
| 57 | let p = embassy_stm32::init(config); | 57 | let p = embassy_stm32::init(config); |