diff options
| author | Dario Nieuwenhuis <[email protected]> | 2023-09-19 04:22:57 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2023-09-21 23:47:56 +0200 |
| commit | 83b4c0127337c55c6a445abee6ab5eac4c993f9c (patch) | |
| tree | daa4050b6dd0bf7ecfae113c51ad2b21fe74e914 /examples/stm32h7/src/bin/low_level_timer_api.rs | |
| parent | e313ca4ae8bb4b7ab5dc4c348a471ccc5745b599 (diff) | |
stm32/rcc: unify h5 and h7.
Diffstat (limited to 'examples/stm32h7/src/bin/low_level_timer_api.rs')
| -rw-r--r-- | examples/stm32h7/src/bin/low_level_timer_api.rs | 30 |
1 files changed, 22 insertions, 8 deletions
diff --git a/examples/stm32h7/src/bin/low_level_timer_api.rs b/examples/stm32h7/src/bin/low_level_timer_api.rs index 45b0872b5..a1e955c39 100644 --- a/examples/stm32h7/src/bin/low_level_timer_api.rs +++ b/examples/stm32h7/src/bin/low_level_timer_api.rs | |||
| @@ -6,7 +6,7 @@ use defmt::*; | |||
| 6 | use embassy_executor::Spawner; | 6 | use embassy_executor::Spawner; |
| 7 | use embassy_stm32::gpio::low_level::AFType; | 7 | use embassy_stm32::gpio::low_level::AFType; |
| 8 | use embassy_stm32::gpio::Speed; | 8 | use embassy_stm32::gpio::Speed; |
| 9 | use embassy_stm32::time::{khz, mhz, Hertz}; | 9 | use embassy_stm32::time::{khz, Hertz}; |
| 10 | use embassy_stm32::timer::*; | 10 | use embassy_stm32::timer::*; |
| 11 | use embassy_stm32::{into_ref, Config, Peripheral, PeripheralRef}; | 11 | use embassy_stm32::{into_ref, Config, Peripheral, PeripheralRef}; |
| 12 | use embassy_time::{Duration, Timer}; | 12 | use embassy_time::{Duration, Timer}; |
| @@ -15,13 +15,27 @@ use {defmt_rtt as _, panic_probe as _}; | |||
| 15 | #[embassy_executor::main] | 15 | #[embassy_executor::main] |
| 16 | async fn main(_spawner: Spawner) { | 16 | async fn main(_spawner: Spawner) { |
| 17 | let mut config = Config::default(); | 17 | let mut config = Config::default(); |
| 18 | config.rcc.sys_ck = Some(mhz(400)); | 18 | { |
| 19 | config.rcc.hclk = Some(mhz(400)); | 19 | use embassy_stm32::rcc::*; |
| 20 | config.rcc.pll1.q_ck = Some(mhz(100)); | 20 | config.rcc.hsi = Some(Hsi::Mhz64); |
| 21 | config.rcc.pclk1 = Some(mhz(100)); | 21 | config.rcc.csi = true; |
| 22 | config.rcc.pclk2 = Some(mhz(100)); | 22 | config.rcc.hsi48 = true; // needed for RNG |
| 23 | config.rcc.pclk3 = Some(mhz(100)); | 23 | config.rcc.pll_src = PllSource::Hsi; |
| 24 | config.rcc.pclk4 = Some(mhz(100)); | 24 | config.rcc.pll1 = Some(Pll { |
| 25 | prediv: 4, | ||
| 26 | mul: 50, | ||
| 27 | divp: Some(2), | ||
| 28 | divq: Some(8), // 100 Mhz | ||
| 29 | divr: None, | ||
| 30 | }); | ||
| 31 | config.rcc.sys = Sysclk::Pll1P; // 400 Mhz | ||
| 32 | config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz | ||
| 33 | config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz | ||
| 34 | config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz | ||
| 35 | config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz | ||
| 36 | config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz | ||
| 37 | config.rcc.voltage_scale = VoltageScale::Scale1; | ||
| 38 | } | ||
| 25 | let p = embassy_stm32::init(config); | 39 | let p = embassy_stm32::init(config); |
| 26 | 40 | ||
| 27 | info!("Hello World!"); | 41 | info!("Hello World!"); |
