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authorMatous Hybl <[email protected]>2022-02-28 16:20:42 +0100
committerMatous Hybl <[email protected]>2022-02-28 16:20:42 +0100
commita88c5e716e7a374e2fc7a602b0c70dea267a2e8a (patch)
treee87527f950a1a2092af667a923a6c1b730155cc4 /examples/stm32h7/src/bin/low_level_timer_api.rs
parent141e007acf5f3c91a9cbd13196c32867bfddd78d (diff)
stm32: Register access for timers now doesn't require self
Diffstat (limited to 'examples/stm32h7/src/bin/low_level_timer_api.rs')
-rw-r--r--examples/stm32h7/src/bin/low_level_timer_api.rs23
1 files changed, 8 insertions, 15 deletions
diff --git a/examples/stm32h7/src/bin/low_level_timer_api.rs b/examples/stm32h7/src/bin/low_level_timer_api.rs
index 0c99b0941..3a47dc22b 100644
--- a/examples/stm32h7/src/bin/low_level_timer_api.rs
+++ b/examples/stm32h7/src/bin/low_level_timer_api.rs
@@ -90,20 +90,16 @@ impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> {
90 this.inner.start(); 90 this.inner.start();
91 91
92 unsafe { 92 unsafe {
93 this.inner 93 T::regs_gp32()
94 .regs_gp32()
95 .ccmr_output(0) 94 .ccmr_output(0)
96 .modify(|w| w.set_ocm(0, OutputCompareMode::PwmMode1.into())); 95 .modify(|w| w.set_ocm(0, OutputCompareMode::PwmMode1.into()));
97 this.inner 96 T::regs_gp32()
98 .regs_gp32()
99 .ccmr_output(0) 97 .ccmr_output(0)
100 .modify(|w| w.set_ocm(1, OutputCompareMode::PwmMode1.into())); 98 .modify(|w| w.set_ocm(1, OutputCompareMode::PwmMode1.into()));
101 this.inner 99 T::regs_gp32()
102 .regs_gp32()
103 .ccmr_output(1) 100 .ccmr_output(1)
104 .modify(|w| w.set_ocm(0, OutputCompareMode::PwmMode1.into())); 101 .modify(|w| w.set_ocm(0, OutputCompareMode::PwmMode1.into()));
105 this.inner 102 T::regs_gp32()
106 .regs_gp32()
107 .ccmr_output(1) 103 .ccmr_output(1)
108 .modify(|w| w.set_ocm(1, OutputCompareMode::PwmMode1.into())); 104 .modify(|w| w.set_ocm(1, OutputCompareMode::PwmMode1.into()));
109 } 105 }
@@ -112,8 +108,7 @@ impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> {
112 108
113 pub fn enable(&mut self, channel: Channel) { 109 pub fn enable(&mut self, channel: Channel) {
114 unsafe { 110 unsafe {
115 self.inner 111 T::regs_gp32()
116 .regs_gp32()
117 .ccer() 112 .ccer()
118 .modify(|w| w.set_cce(channel.raw(), true)); 113 .modify(|w| w.set_cce(channel.raw(), true));
119 } 114 }
@@ -121,8 +116,7 @@ impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> {
121 116
122 pub fn disable(&mut self, channel: Channel) { 117 pub fn disable(&mut self, channel: Channel) {
123 unsafe { 118 unsafe {
124 self.inner 119 T::regs_gp32()
125 .regs_gp32()
126 .ccer() 120 .ccer()
127 .modify(|w| w.set_cce(channel.raw(), false)); 121 .modify(|w| w.set_cce(channel.raw(), false));
128 } 122 }
@@ -136,14 +130,13 @@ impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> {
136 } 130 }
137 131
138 pub fn get_max_duty(&self) -> u32 { 132 pub fn get_max_duty(&self) -> u32 {
139 unsafe { self.inner.regs_gp32().arr().read().arr() } 133 unsafe { T::regs_gp32().arr().read().arr() }
140 } 134 }
141 135
142 pub fn set_duty(&mut self, channel: Channel, duty: u32) { 136 pub fn set_duty(&mut self, channel: Channel, duty: u32) {
143 defmt::assert!(duty < self.get_max_duty()); 137 defmt::assert!(duty < self.get_max_duty());
144 unsafe { 138 unsafe {
145 self.inner 139 T::regs_gp32()
146 .regs_gp32()
147 .ccr(channel.raw()) 140 .ccr(channel.raw())
148 .modify(|w| w.set_ccr(duty)) 141 .modify(|w| w.set_ccr(duty))
149 } 142 }