update timer mod after stm32-metapac timer_v2

1 files changed, 7 insertions, 7 deletions

diff --git a/examples/stm32h7/src/bin/dac_dma.rs b/examples/stm32h7/src/bin/dac_dma.rs
index 8e5c41a43..d88bd838f 100644
--- a/examples/stm32h7/src/bin/dac_dma.rs
+++ b/examples/stm32h7/src/bin/dac_dma.rs
@@ -8,7 +8,7 @@ use embassy_stm32::pac::timer::vals::Mms;
 use embassy_stm32::peripherals::{DAC1, DMA1_CH3, DMA1_CH4, TIM6, TIM7};
 use embassy_stm32::rcc::low_level::RccPeripheral;
 use embassy_stm32::time::Hertz;
-use embassy_stm32::timer::low_level::Basic16bitInstance;
+use embassy_stm32::timer::low_level::BasicInstance;
 use micromath::F32Ext;
 use {defmt_rtt as _, panic_probe as _};
 
@@ -75,9 +75,9 @@ async fn dac_task1(mut dac: DacCh1<'static, DAC1, DMA1_CH3>) {
     dac.enable();
 
     TIM6::enable_and_reset();
-    TIM6::regs().arr().modify(|w| w.set_arr(reload as u16 - 1));
-    TIM6::regs().cr2().modify(|w| w.set_mms(Mms::UPDATE));
-    TIM6::regs().cr1().modify(|w| {
+    TIM6::regs_basic().arr().modify(|w| w.set_arr(reload as u16 - 1));
+    TIM6::regs_basic().cr2().modify(|w| w.set_mms(Mms::UPDATE));
+    TIM6::regs_basic().cr1().modify(|w| {
         w.set_opm(false);
         w.set_cen(true);
     });
@@ -112,9 +112,9 @@ async fn dac_task2(mut dac: DacCh2<'static, DAC1, DMA1_CH4>) {
     }
 
     TIM7::enable_and_reset();
-    TIM7::regs().arr().modify(|w| w.set_arr(reload as u16 - 1));
-    TIM7::regs().cr2().modify(|w| w.set_mms(Mms::UPDATE));
-    TIM7::regs().cr1().modify(|w| {
+    TIM7::regs_basic().arr().modify(|w| w.set_arr(reload as u16 - 1));
+    TIM7::regs_basic().cr2().modify(|w| w.set_mms(Mms::UPDATE));
+    TIM7::regs_basic().cr1().modify(|w| {
         w.set_opm(false);
         w.set_cen(true);
     });