diff options
| author | Dario Nieuwenhuis <[email protected]> | 2024-03-23 00:35:06 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2024-03-23 01:37:28 +0100 |
| commit | 389cbc0a77daea15decae706818f104d89446020 (patch) | |
| tree | 4f65728f3d898b779810b6355bce8e46c26e8d0f /examples/stm32h7/src | |
| parent | c2aa95016a6891782bf4e04d7c78e30bcb3afd9c (diff) | |
stm32/timer: simplify traits, convert from trait methods to struct.
Diffstat (limited to 'examples/stm32h7/src')
| -rw-r--r-- | examples/stm32h7/src/bin/dac_dma.rs | 26 | ||||
| -rw-r--r-- | examples/stm32h7/src/bin/low_level_timer_api.rs | 34 |
2 files changed, 31 insertions, 29 deletions
diff --git a/examples/stm32h7/src/bin/dac_dma.rs b/examples/stm32h7/src/bin/dac_dma.rs index feec28993..c45747f35 100644 --- a/examples/stm32h7/src/bin/dac_dma.rs +++ b/examples/stm32h7/src/bin/dac_dma.rs | |||
| @@ -8,7 +8,7 @@ use embassy_stm32::pac::timer::vals::Mms; | |||
| 8 | use embassy_stm32::peripherals::{DAC1, DMA1_CH3, DMA1_CH4, TIM6, TIM7}; | 8 | use embassy_stm32::peripherals::{DAC1, DMA1_CH3, DMA1_CH4, TIM6, TIM7}; |
| 9 | use embassy_stm32::rcc::low_level::RccPeripheral; | 9 | use embassy_stm32::rcc::low_level::RccPeripheral; |
| 10 | use embassy_stm32::time::Hertz; | 10 | use embassy_stm32::time::Hertz; |
| 11 | use embassy_stm32::timer::low_level::BasicInstance; | 11 | use embassy_stm32::timer::low_level::Timer; |
| 12 | use micromath::F32Ext; | 12 | use micromath::F32Ext; |
| 13 | use {defmt_rtt as _, panic_probe as _}; | 13 | use {defmt_rtt as _, panic_probe as _}; |
| 14 | 14 | ||
| @@ -51,12 +51,12 @@ async fn main(spawner: Spawner) { | |||
| 51 | // Obtain two independent channels (p.DAC1 can only be consumed once, though!) | 51 | // Obtain two independent channels (p.DAC1 can only be consumed once, though!) |
| 52 | let (dac_ch1, dac_ch2) = embassy_stm32::dac::Dac::new(p.DAC1, p.DMA1_CH3, p.DMA1_CH4, p.PA4, p.PA5).split(); | 52 | let (dac_ch1, dac_ch2) = embassy_stm32::dac::Dac::new(p.DAC1, p.DMA1_CH3, p.DMA1_CH4, p.PA4, p.PA5).split(); |
| 53 | 53 | ||
| 54 | spawner.spawn(dac_task1(dac_ch1)).ok(); | 54 | spawner.spawn(dac_task1(p.TIM6, dac_ch1)).ok(); |
| 55 | spawner.spawn(dac_task2(dac_ch2)).ok(); | 55 | spawner.spawn(dac_task2(p.TIM7, dac_ch2)).ok(); |
| 56 | } | 56 | } |
| 57 | 57 | ||
| 58 | #[embassy_executor::task] | 58 | #[embassy_executor::task] |
| 59 | async fn dac_task1(mut dac: DacCh1<'static, DAC1, DMA1_CH3>) { | 59 | async fn dac_task1(tim: TIM6, mut dac: DacCh1<'static, DAC1, DMA1_CH3>) { |
| 60 | let data: &[u8; 256] = &calculate_array::<256>(); | 60 | let data: &[u8; 256] = &calculate_array::<256>(); |
| 61 | 61 | ||
| 62 | info!("TIM6 frequency is {}", TIM6::frequency()); | 62 | info!("TIM6 frequency is {}", TIM6::frequency()); |
| @@ -74,10 +74,10 @@ async fn dac_task1(mut dac: DacCh1<'static, DAC1, DMA1_CH3>) { | |||
| 74 | dac.set_triggering(true); | 74 | dac.set_triggering(true); |
| 75 | dac.enable(); | 75 | dac.enable(); |
| 76 | 76 | ||
| 77 | TIM6::enable_and_reset(); | 77 | let tim = Timer::new(tim); |
| 78 | TIM6::regs_basic().arr().modify(|w| w.set_arr(reload as u16 - 1)); | 78 | tim.regs_basic().arr().modify(|w| w.set_arr(reload as u16 - 1)); |
| 79 | TIM6::regs_basic().cr2().modify(|w| w.set_mms(Mms::UPDATE)); | 79 | tim.regs_basic().cr2().modify(|w| w.set_mms(Mms::UPDATE)); |
| 80 | TIM6::regs_basic().cr1().modify(|w| { | 80 | tim.regs_basic().cr1().modify(|w| { |
| 81 | w.set_opm(false); | 81 | w.set_opm(false); |
| 82 | w.set_cen(true); | 82 | w.set_cen(true); |
| 83 | }); | 83 | }); |
| @@ -99,7 +99,7 @@ async fn dac_task1(mut dac: DacCh1<'static, DAC1, DMA1_CH3>) { | |||
| 99 | } | 99 | } |
| 100 | 100 | ||
| 101 | #[embassy_executor::task] | 101 | #[embassy_executor::task] |
| 102 | async fn dac_task2(mut dac: DacCh2<'static, DAC1, DMA1_CH4>) { | 102 | async fn dac_task2(tim: TIM7, mut dac: DacCh2<'static, DAC1, DMA1_CH4>) { |
| 103 | let data: &[u8; 256] = &calculate_array::<256>(); | 103 | let data: &[u8; 256] = &calculate_array::<256>(); |
| 104 | 104 | ||
| 105 | info!("TIM7 frequency is {}", TIM7::frequency()); | 105 | info!("TIM7 frequency is {}", TIM7::frequency()); |
| @@ -111,10 +111,10 @@ async fn dac_task2(mut dac: DacCh2<'static, DAC1, DMA1_CH4>) { | |||
| 111 | error!("Reload value {} below threshold!", reload); | 111 | error!("Reload value {} below threshold!", reload); |
| 112 | } | 112 | } |
| 113 | 113 | ||
| 114 | TIM7::enable_and_reset(); | 114 | let tim = Timer::new(tim); |
| 115 | TIM7::regs_basic().arr().modify(|w| w.set_arr(reload as u16 - 1)); | 115 | tim.regs_basic().arr().modify(|w| w.set_arr(reload as u16 - 1)); |
| 116 | TIM7::regs_basic().cr2().modify(|w| w.set_mms(Mms::UPDATE)); | 116 | tim.regs_basic().cr2().modify(|w| w.set_mms(Mms::UPDATE)); |
| 117 | TIM7::regs_basic().cr1().modify(|w| { | 117 | tim.regs_basic().cr1().modify(|w| { |
| 118 | w.set_opm(false); | 118 | w.set_opm(false); |
| 119 | w.set_cen(true); | 119 | w.set_cen(true); |
| 120 | }); | 120 | }); |
diff --git a/examples/stm32h7/src/bin/low_level_timer_api.rs b/examples/stm32h7/src/bin/low_level_timer_api.rs index 049d9967d..780fbc6f0 100644 --- a/examples/stm32h7/src/bin/low_level_timer_api.rs +++ b/examples/stm32h7/src/bin/low_level_timer_api.rs | |||
| @@ -6,8 +6,9 @@ use embassy_executor::Spawner; | |||
| 6 | use embassy_stm32::gpio::low_level::AFType; | 6 | use embassy_stm32::gpio::low_level::AFType; |
| 7 | use embassy_stm32::gpio::Speed; | 7 | use embassy_stm32::gpio::Speed; |
| 8 | use embassy_stm32::time::{khz, Hertz}; | 8 | use embassy_stm32::time::{khz, Hertz}; |
| 9 | use embassy_stm32::timer::*; | 9 | use embassy_stm32::timer::low_level::{OutputCompareMode, Timer as LLTimer}; |
| 10 | use embassy_stm32::{into_ref, Config, Peripheral, PeripheralRef}; | 10 | use embassy_stm32::timer::{Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance32bit4Channel}; |
| 11 | use embassy_stm32::{into_ref, Config, Peripheral}; | ||
| 11 | use embassy_time::Timer; | 12 | use embassy_time::Timer; |
| 12 | use {defmt_rtt as _, panic_probe as _}; | 13 | use {defmt_rtt as _, panic_probe as _}; |
| 13 | 14 | ||
| @@ -56,11 +57,11 @@ async fn main(_spawner: Spawner) { | |||
| 56 | Timer::after_millis(300).await; | 57 | Timer::after_millis(300).await; |
| 57 | } | 58 | } |
| 58 | } | 59 | } |
| 59 | pub struct SimplePwm32<'d, T: CaptureCompare32bitInstance> { | 60 | pub struct SimplePwm32<'d, T: GeneralInstance32bit4Channel> { |
| 60 | inner: PeripheralRef<'d, T>, | 61 | tim: LLTimer<'d, T>, |
| 61 | } | 62 | } |
| 62 | 63 | ||
| 63 | impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> { | 64 | impl<'d, T: GeneralInstance32bit4Channel> SimplePwm32<'d, T> { |
| 64 | pub fn new( | 65 | pub fn new( |
| 65 | tim: impl Peripheral<P = T> + 'd, | 66 | tim: impl Peripheral<P = T> + 'd, |
| 66 | ch1: impl Peripheral<P = impl Channel1Pin<T>> + 'd, | 67 | ch1: impl Peripheral<P = impl Channel1Pin<T>> + 'd, |
| @@ -69,9 +70,7 @@ impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> { | |||
| 69 | ch4: impl Peripheral<P = impl Channel4Pin<T>> + 'd, | 70 | ch4: impl Peripheral<P = impl Channel4Pin<T>> + 'd, |
| 70 | freq: Hertz, | 71 | freq: Hertz, |
| 71 | ) -> Self { | 72 | ) -> Self { |
| 72 | into_ref!(tim, ch1, ch2, ch3, ch4); | 73 | into_ref!(ch1, ch2, ch3, ch4); |
| 73 | |||
| 74 | T::enable_and_reset(); | ||
| 75 | 74 | ||
| 76 | ch1.set_speed(Speed::VeryHigh); | 75 | ch1.set_speed(Speed::VeryHigh); |
| 77 | ch1.set_as_af(ch1.af_num(), AFType::OutputPushPull); | 76 | ch1.set_as_af(ch1.af_num(), AFType::OutputPushPull); |
| @@ -82,12 +81,12 @@ impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> { | |||
| 82 | ch4.set_speed(Speed::VeryHigh); | 81 | ch4.set_speed(Speed::VeryHigh); |
| 83 | ch4.set_as_af(ch1.af_num(), AFType::OutputPushPull); | 82 | ch4.set_as_af(ch1.af_num(), AFType::OutputPushPull); |
| 84 | 83 | ||
| 85 | let mut this = Self { inner: tim }; | 84 | let mut this = Self { tim: LLTimer::new(tim) }; |
| 86 | 85 | ||
| 87 | this.set_frequency(freq); | 86 | this.set_frequency(freq); |
| 88 | this.inner.start(); | 87 | this.tim.start(); |
| 89 | 88 | ||
| 90 | let r = T::regs_gp32(); | 89 | let r = this.tim.regs_gp32(); |
| 91 | r.ccmr_output(0) | 90 | r.ccmr_output(0) |
| 92 | .modify(|w| w.set_ocm(0, OutputCompareMode::PwmMode1.into())); | 91 | .modify(|w| w.set_ocm(0, OutputCompareMode::PwmMode1.into())); |
| 93 | r.ccmr_output(0) | 92 | r.ccmr_output(0) |
| @@ -101,23 +100,26 @@ impl<'d, T: CaptureCompare32bitInstance> SimplePwm32<'d, T> { | |||
| 101 | } | 100 | } |
| 102 | 101 | ||
| 103 | pub fn enable(&mut self, channel: Channel) { | 102 | pub fn enable(&mut self, channel: Channel) { |
| 104 | T::regs_gp32().ccer().modify(|w| w.set_cce(channel.index(), true)); | 103 | self.tim.regs_gp32().ccer().modify(|w| w.set_cce(channel.index(), true)); |
| 105 | } | 104 | } |
| 106 | 105 | ||
| 107 | pub fn disable(&mut self, channel: Channel) { | 106 | pub fn disable(&mut self, channel: Channel) { |
| 108 | T::regs_gp32().ccer().modify(|w| w.set_cce(channel.index(), false)); | 107 | self.tim |
| 108 | .regs_gp32() | ||
| 109 | .ccer() | ||
| 110 | .modify(|w| w.set_cce(channel.index(), false)); | ||
| 109 | } | 111 | } |
| 110 | 112 | ||
| 111 | pub fn set_frequency(&mut self, freq: Hertz) { | 113 | pub fn set_frequency(&mut self, freq: Hertz) { |
| 112 | <T as embassy_stm32::timer::low_level::GeneralPurpose32bitInstance>::set_frequency(&mut self.inner, freq); | 114 | self.tim.set_frequency(freq); |
| 113 | } | 115 | } |
| 114 | 116 | ||
| 115 | pub fn get_max_duty(&self) -> u32 { | 117 | pub fn get_max_duty(&self) -> u32 { |
| 116 | T::regs_gp32().arr().read() | 118 | self.tim.regs_gp32().arr().read() |
| 117 | } | 119 | } |
| 118 | 120 | ||
| 119 | pub fn set_duty(&mut self, channel: Channel, duty: u32) { | 121 | pub fn set_duty(&mut self, channel: Channel, duty: u32) { |
| 120 | defmt::assert!(duty < self.get_max_duty()); | 122 | defmt::assert!(duty < self.get_max_duty()); |
| 121 | T::regs_gp32().ccr(channel.index()).write_value(duty) | 123 | self.tim.regs_gp32().ccr(channel.index()).write_value(duty) |
| 122 | } | 124 | } |
| 123 | } | 125 | } |
