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authorvinsynth <[email protected]>2025-05-05 17:32:38 -0400
committervinsynth <[email protected]>2025-05-05 17:32:38 -0400
commit57938d1174a2c8f29448b4fffaea33dba06ae653 (patch)
tree0788d1da1c3c2ed622d1a710157fbb33b4af4579 /examples/stm32h7/src
parent6034b17728b3528e42c8499a2893dc35d51d5590 (diff)
fix h7 sai example start sequence
Diffstat (limited to 'examples/stm32h7/src')
-rw-r--r--examples/stm32h7/src/bin/sai.rs4
1 files changed, 3 insertions, 1 deletions
diff --git a/examples/stm32h7/src/bin/sai.rs b/examples/stm32h7/src/bin/sai.rs
index 95ffe257a..79a856b3b 100644
--- a/examples/stm32h7/src/bin/sai.rs
+++ b/examples/stm32h7/src/bin/sai.rs
@@ -112,8 +112,10 @@ async fn main(_spawner: Spawner) {
112 let mut buf = [0u32; HALF_DMA_BUFFER_LENGTH]; 112 let mut buf = [0u32; HALF_DMA_BUFFER_LENGTH];
113 113
114 loop { 114 loop {
115 sai_receiver.read(&mut buf).await.unwrap(); 115 // write() must be called before read() to start the master (transmitter)
116 // clock used by the receiver
116 sai_transmitter.write(&buf).await.unwrap(); 117 sai_transmitter.write(&buf).await.unwrap();
118 sai_receiver.read(&mut buf).await.unwrap();
117 } 119 }
118} 120}
119 121