fix release mode that was broken by lto and codegen units (there are probably things that can be done to be able to keep lto, I haven't found yet)

2 files changed, 6 insertions, 7 deletions

diff --git a/examples/stm32h755cm4/Cargo.toml b/examples/stm32h755cm4/Cargo.toml
index c6d4996f1..d2b9b1f0e 100644
--- a/examples/stm32h755cm4/Cargo.toml
+++ b/examples/stm32h755cm4/Cargo.toml
@@ -49,12 +49,11 @@ overflow-checks = true # <-
 
 # cargo build/run --release
 [profile.release]
-codegen-units = 1
+codegen-units = 16
 debug = 2
 debug-assertions = false # <-
 incremental = false
-#lto = 'fat'
-#opt-level = 3 # <-
+opt-level = 3 # <-
 overflow-checks = false # <-
 
 # cargo test --release
diff --git a/examples/stm32h755cm4/src/bin/intercore.rs b/examples/stm32h755cm4/src/bin/intercore.rs
index 8f61c3eb2..3a66a1ecd 100644
--- a/examples/stm32h755cm4/src/bin/intercore.rs
+++ b/examples/stm32h755cm4/src/bin/intercore.rs
@@ -45,7 +45,7 @@ mod shared {
             };
 
             self.led_states.store(new_value, Ordering::SeqCst);
-            core::sync::atomic::compiler_fence(Ordering::SeqCst);
+            core::sync::atomic::fence(Ordering::SeqCst);
         }
 
         /// Get LED state using safe bit operations
@@ -54,7 +54,7 @@ mod shared {
             let bit = if is_green { GREEN_LED_BIT } else { YELLOW_LED_BIT };
 
             let value = self.led_states.load(Ordering::SeqCst);
-            core::sync::atomic::compiler_fence(Ordering::SeqCst);
+            core::sync::atomic::fence(Ordering::SeqCst);
 
             (value & (1 << bit)) != 0
         }
@@ -66,7 +66,7 @@ mod shared {
             let current = self.counter.load(Ordering::SeqCst);
             let new_value = current.wrapping_add(1);
             self.counter.store(new_value, Ordering::SeqCst);
-            core::sync::atomic::compiler_fence(Ordering::SeqCst);
+            core::sync::atomic::fence(Ordering::SeqCst);
             new_value
         }
 
@@ -74,7 +74,7 @@ mod shared {
         #[inline(never)]
         pub fn get_counter(&self) -> u32 {
             let value = self.counter.load(Ordering::SeqCst);
-            core::sync::atomic::compiler_fence(Ordering::SeqCst);
+            core::sync::atomic::fence(Ordering::SeqCst);
             value
         }
     }