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| author | Dario Nieuwenhuis <[email protected]> | 2025-10-06 22:55:38 +0200 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2025-10-06 23:19:53 +0200 |
| commit | abc8e450f936567ad42cb34b5d2a7941b206aa5d (patch) | |
| tree | 57b8ec55ad4fc9048524f2899b34198c5a8e61df /examples/stm32h755cm7 | |
| parent | e2a2bd3c573928208a4c85e7fcd6ad630f23f47d (diff) | |
Edition 2024.
Diffstat (limited to 'examples/stm32h755cm7')
| -rw-r--r-- | examples/stm32h755cm7/Cargo.toml | 2 | ||||
| -rw-r--r-- | examples/stm32h755cm7/src/bin/intercore.rs | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/examples/stm32h755cm7/Cargo.toml b/examples/stm32h755cm7/Cargo.toml index c34d4e45c..7a1519aae 100644 --- a/examples/stm32h755cm7/Cargo.toml +++ b/examples/stm32h755cm7/Cargo.toml | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | [package] | 1 | [package] |
| 2 | edition = "2021" | 2 | edition = "2024" |
| 3 | name = "embassy-stm32h755cm7-examples" | 3 | name = "embassy-stm32h755cm7-examples" |
| 4 | version = "0.1.0" | 4 | version = "0.1.0" |
| 5 | license = "MIT OR Apache-2.0" | 5 | license = "MIT OR Apache-2.0" |
diff --git a/examples/stm32h755cm7/src/bin/intercore.rs b/examples/stm32h755cm7/src/bin/intercore.rs index a4e1b5ff4..3df0b26d7 100644 --- a/examples/stm32h755cm7/src/bin/intercore.rs +++ b/examples/stm32h755cm7/src/bin/intercore.rs | |||
| @@ -97,7 +97,7 @@ mod shared { | |||
| 97 | } | 97 | } |
| 98 | } | 98 | } |
| 99 | 99 | ||
| 100 | #[link_section = ".ram_d3"] | 100 | #[unsafe(link_section = ".ram_d3")] |
| 101 | pub static SHARED_LED_STATE: SharedLedState = SharedLedState::new(); | 101 | pub static SHARED_LED_STATE: SharedLedState = SharedLedState::new(); |
| 102 | 102 | ||
| 103 | // Memory region constants for MPU configuration | 103 | // Memory region constants for MPU configuration |
| @@ -106,7 +106,7 @@ mod shared { | |||
| 106 | pub const SRAM4_REGION_NUMBER: u8 = 0; | 106 | pub const SRAM4_REGION_NUMBER: u8 = 0; |
| 107 | } | 107 | } |
| 108 | 108 | ||
| 109 | #[link_section = ".ram_d3"] | 109 | #[unsafe(link_section = ".ram_d3")] |
| 110 | static SHARED_DATA: MaybeUninit<SharedData> = MaybeUninit::uninit(); | 110 | static SHARED_DATA: MaybeUninit<SharedData> = MaybeUninit::uninit(); |
| 111 | 111 | ||
| 112 | /// Configure MPU to make SRAM4 region non-cacheable | 112 | /// Configure MPU to make SRAM4 region non-cacheable |