aboutsummaryrefslogtreecommitdiff
path: root/examples/stm32l4/src/bin/adc.rs
diff options
context:
space:
mode:
authorBob McWhirter <[email protected]>2021-06-10 15:33:43 -0400
committerBob McWhirter <[email protected]>2021-06-14 13:20:42 -0400
commitd58fb11b2e020a6a0b846e3437440ff688b2fe94 (patch)
tree13847832913a929eae437c8830c0268966f9ba6e /examples/stm32l4/src/bin/adc.rs
parent0dafd8f763a65558b88b2c7d55c933863c481d39 (diff)
ADCv3 and example.
Diffstat (limited to 'examples/stm32l4/src/bin/adc.rs')
-rw-r--r--examples/stm32l4/src/bin/adc.rs100
1 files changed, 100 insertions, 0 deletions
diff --git a/examples/stm32l4/src/bin/adc.rs b/examples/stm32l4/src/bin/adc.rs
new file mode 100644
index 000000000..fe97fb0b1
--- /dev/null
+++ b/examples/stm32l4/src/bin/adc.rs
@@ -0,0 +1,100 @@
1#![no_std]
2#![no_main]
3#![feature(trait_alias)]
4#![feature(min_type_alias_impl_trait)]
5#![feature(impl_trait_in_bindings)]
6#![feature(type_alias_impl_trait)]
7
8#[path = "../example_common.rs"]
9mod example_common;
10
11use embassy_stm32::gpio::{Input, Level, NoPin, Output, Pull};
12use embedded_hal::digital::v2::{InputPin, OutputPin};
13use example_common::*;
14
15use cortex_m_rt::entry;
16//use stm32f4::stm32f429 as pac;
17use cortex_m::delay::Delay;
18use embassy_stm32::adc::{Adc, Resolution};
19use embassy_stm32::dac::{Channel, Dac, Value};
20use embassy_stm32::spi::{ByteOrder, Config, Spi, MODE_0};
21use embassy_stm32::time::Hertz;
22use embedded_hal::blocking::spi::Transfer;
23use micromath::F32Ext;
24use stm32l4::stm32l4x5 as pac;
25use stm32l4xx_hal::gpio::PA4;
26use stm32l4xx_hal::rcc::PllSource;
27use stm32l4xx_hal::{prelude::*, rcc};
28
29#[entry]
30fn main() -> ! {
31 info!("Hello World, dude!");
32 //let pp = pac::Peripherals::take().unwrap();
33 let cp = cortex_m::Peripherals::take().unwrap();
34 let pp = stm32l4xx_hal::stm32::Peripherals::take().unwrap();
35 let mut flash = pp.FLASH.constrain();
36 let mut rcc = pp.RCC.constrain();
37 let mut pwr = pp.PWR.constrain(&mut rcc.apb1r1);
38
39 let mut delay = Delay::new(cp.SYST, 80_000_000);
40
41 // TRY the other clock configuration
42 // let clocks = rcc.cfgr.freeze(&mut flash.acr);
43 let clocks = rcc
44 .cfgr
45 .sysclk(80.mhz())
46 .pclk1(80.mhz())
47 .pclk2(80.mhz())
48 .pll_source(PllSource::HSI16)
49 .freeze(&mut flash.acr, &mut pwr);
50
51 let pp = unsafe { pac::Peripherals::steal() };
52
53 pp.RCC.ccipr.modify(|_, w| {
54 unsafe {
55 w.adcsel().bits(0b11);
56 }
57 w
58 });
59
60 pp.DBGMCU.cr.modify(|_, w| {
61 w.dbg_sleep().set_bit();
62 w.dbg_standby().set_bit();
63 w.dbg_stop().set_bit()
64 });
65
66 pp.RCC.ahb2enr.modify(|_, w| {
67 w.adcen().set_bit();
68 w.gpioaen().set_bit();
69 w.gpioben().set_bit();
70 w.gpiocen().set_bit();
71 w.gpioden().set_bit();
72 w.gpioeen().set_bit();
73 w.gpiofen().set_bit();
74 w
75 });
76
77 let p = embassy_stm32::init(Default::default());
78
79 let (mut adc, mut delay) = Adc::new(p.ADC1, delay);
80 //adc.enable_vref();
81 adc.set_resolution(Resolution::EightBit);
82 let mut channel = p.PC0;
83
84 loop {
85 let v = adc.read(&mut channel);
86 info!("--> {}", v);
87 }
88}
89
90fn to_sine_wave(v: u8) -> u8 {
91 if v >= 128 {
92 // top half
93 let r = 3.14 * ((v - 128) as f32 / 128.0);
94 (r.sin() * 128.0 + 127.0) as u8
95 } else {
96 // bottom half
97 let r = 3.14 + 3.14 * (v as f32 / 128.0);
98 (r.sin() * 128.0 + 127.0) as u8
99 }
100}