diff options
| author | Dario Nieuwenhuis <[email protected]> | 2022-01-14 22:02:00 +0100 |
|---|---|---|
| committer | Dario Nieuwenhuis <[email protected]> | 2022-01-19 17:59:55 +0100 |
| commit | 58fc64722c65bbdc209ae0fd1700f03702bbcd08 (patch) | |
| tree | 77f9412b47259cd4cf4170b0a257b371398d4f2c /examples/stm32l4/src/bin/spi_blocking_async.rs | |
| parent | 52e156b429417bde59d0ea67d11256866f1dcec9 (diff) | |
stm32/gpio: expose all functionality as inherent methods.
Diffstat (limited to 'examples/stm32l4/src/bin/spi_blocking_async.rs')
| -rw-r--r-- | examples/stm32l4/src/bin/spi_blocking_async.rs | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/examples/stm32l4/src/bin/spi_blocking_async.rs b/examples/stm32l4/src/bin/spi_blocking_async.rs index f092706d4..3be3f21c9 100644 --- a/examples/stm32l4/src/bin/spi_blocking_async.rs +++ b/examples/stm32l4/src/bin/spi_blocking_async.rs | |||
| @@ -12,7 +12,6 @@ use embassy_stm32::spi::{Config, Spi}; | |||
| 12 | use embassy_stm32::time::Hertz; | 12 | use embassy_stm32::time::Hertz; |
| 13 | use embassy_stm32::Peripherals; | 13 | use embassy_stm32::Peripherals; |
| 14 | use embassy_traits::{adapter::BlockingAsync, spi::FullDuplex}; | 14 | use embassy_traits::{adapter::BlockingAsync, spi::FullDuplex}; |
| 15 | use embedded_hal::digital::v2::{InputPin, OutputPin}; | ||
| 16 | use example_common::*; | 15 | use example_common::*; |
| 17 | 16 | ||
| 18 | #[embassy::main] | 17 | #[embassy::main] |
| @@ -41,17 +40,17 @@ async fn main(_spawner: Spawner, p: Peripherals) { | |||
| 41 | let ready = Input::new(p.PE1, Pull::Up); | 40 | let ready = Input::new(p.PE1, Pull::Up); |
| 42 | 41 | ||
| 43 | cortex_m::asm::delay(100_000); | 42 | cortex_m::asm::delay(100_000); |
| 44 | unwrap!(reset.set_high()); | 43 | reset.set_high(); |
| 45 | cortex_m::asm::delay(100_000); | 44 | cortex_m::asm::delay(100_000); |
| 46 | 45 | ||
| 47 | while unwrap!(ready.is_low()) { | 46 | while ready.is_low() { |
| 48 | info!("waiting for ready"); | 47 | info!("waiting for ready"); |
| 49 | } | 48 | } |
| 50 | 49 | ||
| 51 | let write = [0x0A; 10]; | 50 | let write = [0x0A; 10]; |
| 52 | let mut read = [0; 10]; | 51 | let mut read = [0; 10]; |
| 53 | unwrap!(cs.set_low()); | 52 | cs.set_low(); |
| 54 | spi.read_write(&mut read, &write).await.ok(); | 53 | spi.read_write(&mut read, &write).await.ok(); |
| 55 | unwrap!(cs.set_high()); | 54 | cs.set_high(); |
| 56 | info!("xfer {=[u8]:x}", read); | 55 | info!("xfer {=[u8]:x}", read); |
| 57 | } | 56 | } |
